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TLV9144IDR

Public Made by Adom

by adom

Texas Instruments , SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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TLV9144IDR

Texas Instruments · IC · SOIC-14

TLV9144IDR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT1 output Output of channel 1.
2 IN1- input Inverting input of channel 1.
3 IN1+ input Noninverting input of channel 1.
4 V+ power_in Positive (highest) power supply; supply voltage VS = (V+) - (V-) is 2.7V to 18V recommended, 20V absolute maximum.
5 IN2+ input Noninverting input of channel 2.
6 IN2- input Inverting input of channel 2.
7 OUT2 output Output of channel 2.
8 OUT3 output Output of channel 3.
9 IN3- input Inverting input of channel 3.
10 IN3+ input Noninverting input of channel 3.
11 V- power_in Negative (lowest) power supply, the ground reference in single-supply use.
12 IN4+ input Noninverting input of channel 4.
13 IN4- input Inverting input of channel 4.
14 OUT4 output Output of channel 4.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VS 0 20 V VS = (V+), (V-) 6
Common-mode input voltage -0.5 0.5 V (V-), 0.5 to (V+) + 0.5 (relative to rails) 6
Differential input voltage 0.2 V VS + 0.2 V 6
Input pin current -10 10 mA Signal input pins 6
Operating ambient temperature TA -55 150 °C 6
Junction temperature TJ 150 °C 6
Storage temperature Tstg -65 150 °C 6
ESD HBM V(ESD) -2500 2500 V ANSI/ESDA/JEDEC JS-001 6
ESD CDM V(ESD) -1500 1500 V ANSI/ESDA/JEDEC JS-002 6
Supply voltage VS 2.7 18 V (V+), (V-) 6
Input voltage range VI -0.2 0.2 V (V-), 0.2 to (V+) + 0.2 (relative to rails) 6
Specified temperature TA -40 125 °C 6
Junction-to-ambient thermal resistance RθJA 90.4 °C/W TLV9144 D (SOIC), 14 pins 7
Junction-to-case (top) thermal resistance RθJC(top) 50.6 °C/W TLV9144 D (SOIC), 14 pins 7
Junction-to-board thermal resistance RθJB 48.5 °C/W TLV9144 D (SOIC), 14 pins 7
Junction-to-top characterization parameter ψJT 11.6 °C/W TLV9144 D (SOIC), 14 pins 7
Junction-to-board characterization parameter ψJB 48 °C/W TLV9144 D (SOIC), 14 pins 7
Input offset voltage VOS -1 0.22 1 mV VCM = V- 8
Input offset voltage over temperature VOS -1.5 1.5 mV TA = -40°C to 125°C 8
Input offset voltage drift dVOS/dT 0.65 µV/℃ TA = -40°C to 125°C 8
Power supply rejection ratio PSRR -1 0.112 1 µV/V VCM = V-, VS = 5V to 18V, TA = -40°C to 125°C 8
Power supply rejection ratio PSRR 115 139 dB VCM = V-, VS = 5V to 18V, TA = -40°C to 125°C 8
Power supply rejection ratio PSRR -1.8 0.1 1.8 µV/V VCM = V-, VS = 2.7V to 18V, TA = -40°C to 125°C 8
Power supply rejection ratio PSRR 114 140 dB VCM = V-, VS = 2.7V to 18V, TA = -40°C to 125°C 8
Channel separation 5 µV/V f = 0Hz 8
Channel separation 106 dB f = 0Hz 8
Input bias current IB -10 0.5 10 pA 8
Input offset current IOS -10 0.5 10 pA 8
Common-mode voltage range VCM -0.2 0.2 V (V-), 0.2 to (V+) + 0.2 (relative to rails) 8
Common-mode rejection ratio CMRR 99 108 dB VS = 18V, (V-), 0.1V < VCM < (V+), 2V (Main input pair) 8
Common-mode rejection ratio CMRR 86 94 dB VS = 5V, (V-), 0.1V < VCM < (V+), 2V (Main input pair) 8
Common-mode rejection ratio CMRR 75 85 dB VS = 2.7V, (V-), 0.1V < VCM < (V+), 2V (Main input pair) 8
Common-mode rejection ratio CMRR 80 91 dB VS = 18V, (V-), 0.2V < VCM < (V+) + 0.2V (Both input pairs) 8
Open-loop voltage gain AOL 110 135 dB VS = 18V, VCM = V-, (V-) + 0.1V < VO < (V+), 0.1V 9
Open-loop voltage gain AOL 105 130 dB VS = 5V, VCM = V-, (V-) + 0.1V < VO < (V+), 0.1V 9
Open-loop voltage gain AOL 100 120 dB VS = 2.7V, VCM = V-, (V-) + 0.1V < VO < (V+), 0.1V 9
Output swing from rail 5 10 mV VS = 18V, RL = no load 9
Output swing from rail 50 60 mV VS = 18V, RL = 10kΩ 9
Output swing from rail 266 300 mV VS = 18V, RL = 2kΩ 9
Output swing from rail 1 5 mV VS = 2.7V, RL = no load 9
Output swing from rail 12 20 mV VS = 2.7V, RL = 10kΩ 9
Output swing from rail 58 80 mV VS = 2.7V, RL = 2kΩ 9
Quiescent current per amplifier IQ 6.6 9 µA VCM = V-, IO = 0A 9
Quiescent current per amplifier IQ 9.5 µA TA = -40°C to 125°C 9
Gain-bandwidth product GBW 110 kHz RL = 1MΩ 9
Slew rate SR 0.1 V/µs VS = 18V, G = +1, CL = 20pF 9
Phase margin PM 50 ° G = +1, RL = 1MΩ, CL = 20pF 9
Short-circuit current ISC 40 mA ±40 9

CAD (KiCad official)

  • Symbol: TLV9144IDR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: tlv9144idr-etched.step / tlv9144idr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv9144idr.step / tlv9144idr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (59 pp, sha256 44236e4cce8ea160, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF