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RS573XTSS20
Public Made by Adomby adom
Jiangsu RUNIC Tech Latches, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownRS573XTSS20
Jiangsu RUNIC Tech · Latches · TSSOP-20
RS573XTSS20 from Jiangsu RUNIC Tech, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | 3-state output enable input (active low); when it is high, the Q outputs are forced to the high-impedance Z state. |
| 2 | D0 | input | Data input for latch 0; while LE is high, Q0 follows D0, and inputs are overvoltage tolerant to 5.5 V. |
| 3 | D1 | input | Data input for latch 1; while LE is high, Q1 follows D1, and inputs are overvoltage tolerant to 5.5 V. |
| 4 | D2 | input | Data input for latch 2; while LE is high, Q2 follows D2, and inputs are overvoltage tolerant to 5.5 V. |
| 5 | D3 | input | Data input for latch 3; while LE is high, Q3 follows D3, and inputs are overvoltage tolerant to 5.5 V. |
| 6 | D4 | input | Data input for latch 4; while LE is high, Q4 follows D4, and inputs are overvoltage tolerant to 5.5 V. |
| 7 | D5 | input | Data input for latch 5; while LE is high, Q5 follows D5, and inputs are overvoltage tolerant to 5.5 V. |
| 8 | D6 | input | Data input for latch 6; while LE is high, Q6 follows D6, and inputs are overvoltage tolerant to 5.5 V. |
| 9 | D7 | input | Data input for latch 7; while LE is high, Q7 follows D7, and inputs are overvoltage tolerant to 5.5 V. |
| 10 | GND | power_in | Ground. |
| 11 | LE | input | Latch enable input (active high); when high the latches are transparent, and when low they store the data present a set-up time before the high-to-low LE transition. |
| 12 | Q7 | tri_state | Data output of latch 7, a 3-state output that goes high-impedance when OE is high. |
| 13 | Q6 | tri_state | Data output of latch 6, a 3-state output that goes high-impedance when OE is high. |
| 14 | Q5 | tri_state | Data output of latch 5, a 3-state output that goes high-impedance when OE is high. |
| 15 | Q4 | tri_state | Data output of latch 4, a 3-state output that goes high-impedance when OE is high. |
| 16 | Q3 | tri_state | Data output of latch 3, a 3-state output that goes high-impedance when OE is high. |
| 17 | Q2 | tri_state | Data output of latch 2, a 3-state output that goes high-impedance when OE is high. |
| 18 | Q1 | tri_state | Data output of latch 1, a 3-state output that goes high-impedance when OE is high. |
| 19 | Q0 | tri_state | Data output of latch 0, a 3-state output that goes high-impedance when OE is high. |
| 20 | VCC | power_in | Supply voltage, specified from 1.65 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Jiangsu RUNIC Tech |
| Package | TSSOP-20 |
| Category | Logic ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range (absolute maximum) | VCC | -0.5 | 7 | V | 7 | ||
| Input clamp current | IIK | -50 | 50 | mA | VI<0 | 7 | |
| Output clamp current | IOK | -50 | 50 | mA | Vo<0 | 7 | |
| Continuous output current | IO | -50 | 50 | mA | VO = 0 to VCC | 7 | |
| Continuous current through VCC or GND | -100 | 100 | mA | 7 | |||
| Package thermal impedance, TSSOP-20 | θJA | 40 | °C/W | TSSOP-20; calculated per JESD-51 | 7 | ||
| Junction temperature | TJ | -40 | 150 | °C | 7 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 7 | ||
| Supply voltage | VCC | 1.65 | 5.5 | V | 8 | ||
| High-level input voltage | VIH | 1.7 | V | VCC 2.3V to 2.7V | 8 | ||
| High-level input voltage | VIH | 2 | V | VCC 3V to 3.6V | 8 | ||
| Low-level input voltage | VIL | 0.7 | V | VCC 2.3V to 2.7V | 8 | ||
| Low-level input voltage | VIL | 0.8 | V | VCC 3V to 3.6V | 8 | ||
| Input voltage | VI | 0 | 5.5 | V | 8 | ||
| Output voltage | VO | 0 | V | 8 | |||
| High-level output current | IOH | -4 | mA | VCC 1.65V to 1.95V | 8 | ||
| High-level output current | IOH | -8 | mA | VCC 2.3V to 2.7V | 8 | ||
| High-level output current | IOH | -24 | mA | VCC 3V to 3.6V | 8 | ||
| High-level output current | IOH | -32 | mA | VCC 4.5V to 5.5V | 8 | ||
| Low-level output current | IOL | 4 | mA | VCC 1.65V to 1.95V | 8 | ||
| Low-level output current | IOL | 8 | mA | VCC 2.3V to 2.7V | 8 | ||
| Low-level output current | IOL | 24 | mA | VCC 3V to 3.6V | 8 | ||
| Low-level output current | IOL | 32 | mA | VCC 4.5V to 5.5V | 8 | ||
| Input transition rise or fall rate, data inputs | Δt/Δv | 20 | ns/V | VCC 1.65V to 1.95V | 8 | ||
| Input transition rise or fall rate, data inputs | Δt/Δv | 10 | ns/V | VCC 3V to 3.6V | 8 | ||
| Input transition rise or fall rate, data inputs | Δt/Δv | 5 | ns/V | VCC 4.5V to 5.5V | 8 | ||
| Operating free-air temperature | TA | -40 | 125 | °C | 8 | ||
| High-level output voltage | VOH | 1.2 | V | IOH = -4mA, VI = VIH, VCC 1.65V, +25C | 9 | ||
| High-level output voltage | VOH | 1.9 | V | IOH = -8mA, VI = VIH, VCC 2.5V, +25C | 9 | ||
| High-level output voltage | VOH | 2.4 | V | IOH = -24mA, VI = VIH, VCC 3.3V, +25C | 9 | ||
| High-level output voltage | VOH | 3.8 | V | IOH = -32mA, VI = VIH, VCC 4.5V, +25C | 9 | ||
| Low-level output voltage | VOL | 0.1 | V | IOL = 100µA, VI = VIL, VCC 1.65V to 4.5V, +25C | 9 | ||
| Low-level output voltage | VOL | 0.45 | V | IOL = 4mA, VI = VIL, VCC 1.65V, +25C | 9 | ||
| Low-level output voltage | VOL | 0.3 | V | IOL = 8mA, VI = VIL, VCC 2.5V, +25C | 9 | ||
| Low-level output voltage | VOL | 0.55 | V | IOL = 24mA, VI = VIL, VCC 3.3V, +25C | 9 | ||
| Input leakage current | II | -1 | 1 | µA | All inputs VI = 5.5V or GND, VCC 0V to 5.5V, +25C | 9 | |
| Input leakage current | II | -5 | 5 | µA | All inputs VI = 5.5V or GND, VCC 0V to 5.5V, Full temperature range | 9 | |
| Power-off leakage current | Ioff | -1 | 1 | µA | VI or VO = 5.5V, VCC 0V, +25C | 9 | |
| Power-off leakage current | Ioff | -10 | 10 | µA | VI or VO = 5.5V, VCC 0V, Full temperature range | 9 | |
| Off-state (high-impedance) output current | IOZ | -1 | 1 | µA | VO = VCC or GND, VCC 1.65V to 5.5V, +25C | 9 | |
| Off-state (high-impedance) output current | IOZ | -10 | 10 | µA | VO = VCC or GND, VCC 1.65V to 5.5V, Full temperature range | 9 | |
| VCC supply current | ICC | 0.1 | 8 | µA | VI = VCC or GND, IO = 0, VCC 1.65V to 5.5V, +25C | 9 | |
| VCC supply current | ICC | 80 | µA | VI = VCC or GND, IO = 0, VCC 1.65V to 5.5V, Full temperature range | 9 | ||
| Input capacitance | CI | 3 | pF | f = 1MHz, VCC 1.65V to 5.5V, +25C | 9 | ||
| Power dissipation capacitance | CPD | 13 | pF | f = 1MHz, no load, +25C | 9 |
CAD (KiCad official)
- Symbol:
RS573XTSS20 - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
rs573xtss20-etched.step/rs573xtss20-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rs573xtss20.step/rs573xtss20.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Jiangsu RUNIC Tech datasheet (15 pp, sha256
8f7066a2f0402b8b, retrieved 2026-10-29, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).