component
MCP6274-E
Public Made by Adomby adom
Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Contents
README
markdownMCP6274-E
Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · SOIC-14
MCP6274-E from Microchip Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUTA | output | Analog output of op amp A, a low-impedance voltage source. |
| 2 | VINA- | input | Inverting input of op amp A, a high-impedance CMOS input with low bias current. |
| 3 | VINA+ | input | Non-inverting input of op amp A, a high-impedance CMOS input with low bias current. |
| 4 | VDD | power_in | Positive power supply, 2.0V to 6.0V above VSS, and needs bypass capacitors. |
| 5 | VINB+ | input | Non-inverting input of op amp B, a high-impedance CMOS input with low bias current. |
| 6 | VINB- | input | Inverting input of op amp B, a high-impedance CMOS input with low bias current. |
| 7 | VOUTB | output | Analog output of op amp B, a low-impedance voltage source. |
| 8 | VOUTC | output | Analog output of op amp C, a low-impedance voltage source. |
| 9 | VINC- | input | Inverting input of op amp C, a high-impedance CMOS input with low bias current. |
| 10 | VINC+ | input | Non-inverting input of op amp C, a high-impedance CMOS input with low bias current. |
| 11 | VSS | power_in | Negative power supply, connected to ground in single-supply use. |
| 12 | VIND+ | input | Non-inverting input of op amp D, a high-impedance CMOS input with low bias current. |
| 13 | VIND- | input | Inverting input of op amp D, a high-impedance CMOS input with low bias current. |
| 14 | VOUTD | output | Analog output of op amp D, a low-impedance voltage source. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-14 |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | -3 | 3 | mV | VCM = VSS | 3 | |
| Input Offset Voltage (Extended Temperature) | VOS | -5 | 5 | mV | TA = -40°C to +125°C, VCM = VSS | 3 | |
| Power Supply Rejection Ratio | PSRR | 70 | 90 | dB | VCM = VSS | 3 | |
| Input Bias Current at 85°C | IB | 50 | 200 | pA | TA= +85°C (Note 2) | 3 | |
| Input Bias Current at 125°C | IB | 2 | 5 | nA | TA= +125°C (Note 2) | 3 | |
| Common-mode Rejection Ratio | CMRR | 70 | 85 | dB | VCM = -0.3V to 2.5V, VDD = 5V (Note 6) | 3 | |
| Common-mode Rejection Ratio | CMRR | 65 | 80 | dB | VCM = -0.3V to 5.3V, VDD = 5V (Note 6) | 3 | |
| DC Open-Loop Gain (Large Signal) | AOL | 90 | 110 | dB | VOUT = 0.2V to VDD, 0.2V, VCM = VSS (Note 1) | 3 | |
| Supply Voltage | VDD | 2 | 6 | V | 4 | ||
| Quiescent Current per Amplifier | IQ | 100 | 170 | 240 | µA | IO = 0 | 4 |
| Specified Temperature Range | TA | -40 | 125 | °C | 5 | ||
| Operating Temperature Range | TA | -40 | 125 | °C | Note | 5 | |
| Storage Temperature Range | TA | -65 | 150 | °C | 5 | ||
| Absolute Maximum Supply Voltage | VDD -VSS | 7 | V | 3 | |||
| Absolute Maximum Current at Input Pins | -2 | 2 | mA | 3 | |||
| Absolute Maximum Analog Inputs | VIN+, VIN- | -1 | 1 | V | VSS, 1.0V to VDD + 1.0V (offsets relative to VSS/VDD) | 3 | |
| Absolute Maximum Other Inputs and Outputs | -0.3 | 0.3 | V | VSS, 0.3V to VDD + 0.3V (offsets relative to VSS/VDD) | 3 | ||
| Absolute Maximum Current at Output and Supply Pins | -30 | 30 | mA | 3 | |||
| Absolute Maximum Storage Temperature | -65 | 150 | °C | 3 | |||
| Absolute Maximum Junction Temperature | TJ | 150 | °C | 3 | |||
| Thermal Resistance, 14L-SOIC | θJA | 120 | °C/W | 5 | |||
| Input Offset Temperature Drift | ΔVOS/ΔTA | 1.7 | µV/°C | TA = -40°C to +125°C, VCM = VSS | 3 | ||
| Gain Bandwidth Product | GBWP | 2 | MHz | 4 | |||
| Phase Margin | PM | 65 | ° | G = +1 V/V | 4 | ||
| Slew Rate | SR | 0.9 | V/µs | 4 | |||
| Output Short Circuit Current | ISC | 25 | mA | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 | 36 |
CAD (KiCad official)
- Symbol:
MCP6274-E - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
mcp6274-e-etched.step/mcp6274-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp6274-e.step/mcp6274-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (52 pp, sha256
aa459c3f4eed52ce, retrieved 2026-10-26, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).