component
LT3757EMSE#TRPBF
Public Made by Adomby adom
Analog Devices DC-DC Converters, MSOP-10-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownLT3757EMSE#TRPBF
Analog Devices · DC-DC Converters · MSOP-10-EP
LT3757EMSE#TRPBF from Analog Devices, in a MSOP-10-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VC | passive | Error amplifier compensation pin that stabilizes the voltage loop when used with an external RC network. |
| 2 | FBX | input | Positive and negative feedback pin that receives the output feedback from an external resistor divider, regulating to 1.6V (positive output) or -0.8V (negative output), with absolute maximum rating of -6V to 6V. |
| 3 | SS | passive | Soft-start pin whose interval is set by an external capacitor, with a 10µA (typical) pull-up to an internal 2.5V rail, reset to GND by SHDN/UVLO or INTVCC undervoltage/overvoltage conditions or thermal lockout. |
| 4 | RT | passive | Switching frequency adjustment pin where a resistor to GND sets the frequency over 100kHz to 1MHz, and which must not be left open (absolute maximum 1.5V). |
| 5 | SYNC | input | Frequency synchronization pin where RT must be chosen for a switching frequency 20% slower than the SYNC pulse frequency, tied to GND if unused, with input low maximum 0.4V, input high minimum 1.5V and absolute maximum 8V. |
| 6 | SENSE | input | Current sense input that must be Kelvin connected to the positive terminal of the source-side sense resistor, with a 110mV (typical) current limit threshold and an absolute rating of ±0.3V. |
| 7 | GATE | output | N-channel MOSFET gate driver output that switches between INTVCC and GND and is driven low when the IC is shut down, in thermal lockout, or when INTVCC is outside its OV or UV thresholds. |
| 8 | INTVCC | power_out | Regulated 7.2V (typical) supply for internal loads and the gate driver that must be bypassed with at least 4.7µF close to the pin, and which may be connected directly to VIN only if VIN is below 17.5V. |
| 9 | SHDN/UVLO | input | Shutdown and undervoltage detect pin with an accurate 1.22V (nominal) falling threshold, where tying it to 0.4V or less disables the device and reduces VIN quiescent current below 1µA, and absolute maximum rating of 40V. |
| 10 | VIN | power_in | Input supply pin with an operating range of 2.9V to 40V that must be locally bypassed with at least 0.22µF close to the pin. |
| 11 | GND | power_in | Exposed pad ground that also serves as the negative terminal of the current sense resistor and must be soldered directly to the local ground plane. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-10-EP |
| Category | Power Management (PMIC) |
| Pins | 11 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN Operating Range | 2.9 | 40 | V | 3 | |||
| VIN Shutdown IQ | IQ | 0.1 | 1 | µA | SHDN/UVLO = 0V | 3 | |
| VIN Shutdown IQ | IQ | 6 | µA | SHDN/UVLO = 1.15V | 3 | ||
| VIN Operating IQ | IQ | 1.6 | 2.2 | mA | VC = 0.3V, RT = 41.2k | 3 | |
| VIN Operating IQ with Internal LDO Disabled | IQ | 280 | 400 | µA | VC = 0.3V, RT = 41.2k, INTVCC = 7.5V | 3 | |
| SENSE Current Limit Threshold | VSENSE(MAX) | 100 | 110 | 120 | mV | l: full operating temperature range | 3 |
| SENSE Input Bias Current | -65 | µA | Current out of pin | 3 | |||
| FBX Regulation Voltage (VFBX(REG)) | VFBX(REG) | 1.569 | 1.6 | 1.631 | V | VFBX > 0V (Note 3); l: full operating temperature range | 3 |
| FBX Regulation Voltage (VFBX(REG)) | VFBX(REG) | -0.816 | -0.8 | -0.784 | V | VFBX < 0V (Note 3); l: full operating temperature range | 3 |
| FBX Overvoltage Lockout | 6 | 8 | 10 | % | VFBX > 0V (Note 4) | 3 | |
| FBX Overvoltage Lockout | 7 | 11 | 14 | % | VFBX < 0V (Note 4) | 3 | |
| FBX Pin Input Current | -10 | 10 | nA | VFBX = 1.6V (Note 3) | 3 | ||
| FBX Pin Input Current | 70 | 100 | nA | VFBX = -0.8V (Note 3) | 3 | ||
| VFBX Line Regulation | 0.002 | 0.056 | %/V | VFBX > 0V, 2.9V < VIN < 40V (Notes 3, 7) | 3 | ||
| VFBX Line Regulation | 0.0025 | 0.05 | %/V | VFBX < 0V, 2.9V < VIN < 40V (Notes 3, 7) | 3 | ||
| Switching Frequency | 270 | 300 | 330 | kHz | RT = 41.2k to GND, VFBX = 1.6V | 3 | |
| SYNC Input Low | 0.4 | V | 4 | ||||
| SYNC Input High | 1.5 | V | 4 | ||||
| INTVCC Regulation Voltage | INTVCC | 7 | 7.2 | 7.4 | V | l: full operating temperature range | 4 |
| INTVCC Undervoltage Lockout Threshold | 2.6 | 2.7 | 2.8 | V | Falling INTVCC | 4 | |
| INTVCC Overvoltage Lockout Threshold | 16 | 17.5 | V | 4 | |||
| INTVCC Current Limit | 30 | 40 | 55 | mA | VIN = 40V | 4 | |
| INTVCC Load Regulation | -0.9 | -0.5 | % | 0 < IINTVCC < 20mA, VIN = 8V | 4 | ||
| INTVCC Line Regulation | 0.008 | 0.03 | %/V | 8V < VIN < 40V | 4 | ||
| Dropout Voltage (VIN, VINTVCC) | 400 | mV | VIN = 6V, IINTVCC = 20mA | 4 | |||
| SHDN/UVLO Threshold Voltage | 1.17 | 1.22 | 1.27 | V | Falling, VIN = INTVCC = 8V; l: full operating temperature range | 4 | |
| SHDN/UVLO Input Low Voltage | 0.4 | V | I(VIN) drops below 1µA | 4 | |||
| SHDN/UVLO Pin Bias Current Low | 1.7 | 2 | 2.5 | µA | SHDN/UVLO = 1.15V | 4 | |
| SHDN/UVLO Pin Bias Current High | 10 | 100 | nA | SHDN/UVLO = 1.30V | 4 | ||
| Gate VOL | 0.05 | V | 4 | ||||
| VIN, SHDN/UVLO (Note 6) | 40 | V | 2 | ||||
| INTVCC | 20 | V | Also VIN + 0.3V (not numeric; see review_required) | 2 | |||
| SYNC | 8 | V | 2 | ||||
| VC | 3 | V | 2 | ||||
| SS | 3 | V | 2 | ||||
| RT | 1.5 | V | 2 | ||||
| SENSE | -0.3 | 0.3 | V | 2 | |||
| FBX | -6 | 6 | V | (Note 1) | 2 | ||
| Operating Temperature Range (LT3757E/LT3757AE) | -40 | 125 | °C | Notes 2, 8 | 2 | ||
| Storage Temperature Range (MSOP) | -65 | 150 | °C | MSOP package | 2 | ||
| Lead Temperature (Soldering, 10 sec) (MSOP) | 300 | °C | MSOP, 10 sec | 2 | |||
| Maximum Junction Temperature (TJMAX) | TJMAX | 150 | °C | MSE (MSOP) package | 2 | ||
| Junction-to-Ambient Thermal Resistance (θJA) | θJA | 40 | °C/W | MSE package, exposed pad soldered, full copper plane | 2 |
CAD (KiCad official)
- Symbol:
LT3757EMSE#TRPBF - Footprint:
Package_SO:MSOP-10-1EP_3x3mm_P0.5mm_EP1.68x1.88mm - 3D model: MSOP-10-EP (KiCad packages3D, STEP)
- 3D model files:
lt3757emse-trpbf-etched.step/lt3757emse-trpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lt3757emse-trpbf.step/lt3757emse-trpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (38 pp, sha256
135b698b902be7e1, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).