TUSB2046IBVF from Texas Instruments, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	DP0	bidirectional	Root port USB differential data plus, paired with DM0 to form the upstream USB port.
2	DM0	bidirectional	Root port USB differential data minus, paired with DP0 to form the upstream USB port.
3	VCC	power_in	3.3-V supply voltage; recommended operating range is 3.0 V to 3.6 V for the TUSB2046B and 3.3 V to 3.6 V for the TUSB2046BI and TUSB2046I.
4	RESET	input	Active-low TTL input with hysteresis that must be asserted at power-up; a reset pulse of 100 µs to 1 ms is recommended after VCC reaches 90%, and the clock must be active during the last 60 µs of the reset window.
5	EECLK	output	EEPROM serial clock output (3-state) with a 100-µA internal pulldown when EXTMEM is low; it is disabled and must be left unconnected when EXTMEM is high.
6	EEDATA/GANGED	bidirectional	Serial EEPROM data I/O with a 100-µA internal pulldown when EXTMEM is low, or the GANGED power-management mode select when EXTMEM is high; this standard TTL input must not change dynamically during operation.
7	GND	power_in	Ground terminal that must be tied to ground for proper operation.
8	BUSPWR	input	Active-high power source indicator that must be pulled to 3.3 V for bus-powered mode or pulled low for self-powered mode, and must not change dynamically during operation.
9	PWRON1	output	Active-low push-pull power-on/off control output for downstream port 1, which cannot drive 5-V signals so external switches must accept 3.3-V inputs.
10	OVRCUR1	input	Active-low overcurrent input with noise filtering for downstream port 1; in ganged mode all OVRCUR terminals must be tied together.
11	DM1	bidirectional	USB differential data minus for downstream port 1, paired with DP1.
12	DP1	bidirectional	USB differential data plus for downstream port 1, paired with DM1.
13	PWRON2	output	Active-low push-pull power-on/off control output for downstream port 2, which cannot drive 5-V signals so external switches must accept 3.3-V inputs.
14	OVRCUR2	input	Active-low overcurrent input with noise filtering for downstream port 2; in ganged mode all OVRCUR terminals must be tied together.
15	DM2	bidirectional	USB differential data minus for downstream port 2, paired with DP2.
16	DP2	bidirectional	USB differential data plus for downstream port 2, paired with DM2.
17	PWRON3	output	Active-low push-pull power-on/off control output for downstream port 3, which cannot drive 5-V signals so external switches must accept 3.3-V inputs.
18	OVRCUR3	input	Active-low overcurrent input with noise filtering for downstream port 3; in ganged mode all OVRCUR terminals must be tied together.
19	DM3	bidirectional	USB differential data minus for downstream port 3, paired with DP3.
20	DP3	bidirectional	USB differential data plus for downstream port 3, paired with DM3.
21	PWRON4	output	Active-low push-pull power-on/off control output for downstream port 4, which cannot drive 5-V signals so external switches must accept 3.3-V inputs.
22	OVRCUR4	input	Active-low overcurrent input with noise filtering for downstream port 4; in ganged mode all OVRCUR terminals must be tied together.
23	DM4	bidirectional	USB differential data minus for downstream port 4, paired with DP4.
24	DP4	bidirectional	USB differential data plus for downstream port 4, paired with DM4.
25	VCC	power_in	3.3-V supply voltage; recommended operating range is 3.0 V to 3.6 V for the TUSB2046B and 3.3 V to 3.6 V for the TUSB2046BI and TUSB2046I.
26	EXTMEM	input	When high, disables the serial EEPROM interface; when low, pins 5 and 6 act as the EEPROM clock and data terminals.
27	TSTPLL/48MCLK	bidirectional	Test terminal that must be tied to ground for normal 6-MHz operation, or may receive a 48-MHz clock source (no crystal) for 48-MHz input clock operation.
28	GND	power_in	Ground terminal that must be tied to ground for proper operation.
29	XTAL2	output	6-MHz crystal output that must be left open when an oscillator drives XTAL1.
30	XTAL1	input	6-MHz crystal input with 50% duty cycle that drives the internal PLL generating the 48-MHz and 12-MHz clocks; an external oscillator output must not exceed 3.6 V TTL level.
31	TSTMODE	input	Test/mode terminal that must be tied to ground for 6-MHz operation or to 3.3-V VCC for 48-MHz operation.
32	SUSPND	output	Active-high suspend status output for external logic power-down; it is high during suspend mode and low during normal operation.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	LQFP-32(7x7)
Category	Interface
Pins	32

CAD (KiCad official)

Symbol: TUSB2046IBVF
Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
3D model files: tusb2046ibvf-etched.step / tusb2046ibvf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tusb2046ibvf.step / tusb2046ibvf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (33 pp, sha256 eaa20027fc3dde2d, retrieved 2026-11-05, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

TUSB2046IBVF

Verified TUSB2046IBVF

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README

TUSB2046IBVF

Pinout

Key specifications

CAD (KiCad official)

Provenance