Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

SN74LS05DR

Texas Instruments · Inverters · SOIC-14

SN74LS05DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Input of inverter 1; for SN74LS05 the datasheet gives VIH of 2 V minimum and VIL of 0.8 V maximum.
2 1Y output Open-collector output of inverter 1 (Y = A) that requires an external pullup resistor and sinks up to 8 mA IOL for SN74LS05.
3 2A input Input of inverter 2; for SN74LS05 the datasheet gives VIH of 2 V minimum and VIL of 0.8 V maximum.
4 2Y output Open-collector output of inverter 2 (Y = A) that requires an external pullup resistor and sinks up to 8 mA IOL for SN74LS05.
5 3A input Input of inverter 3; for SN74LS05 the datasheet gives VIH of 2 V minimum and VIL of 0.8 V maximum.
6 3Y output Open-collector output of inverter 3 (Y = A) that requires an external pullup resistor and sinks up to 8 mA IOL for SN74LS05.
7 GND power_in Network ground terminal to which all voltages in the datasheet are referenced.
8 4Y output Open-collector output of inverter 4 (Y = A) that requires an external pullup resistor and sinks up to 8 mA IOL for SN74LS05.
9 4A input Input of inverter 4; for SN74LS05 the datasheet gives VIH of 2 V minimum and VIL of 0.8 V maximum.
10 5Y output Open-collector output of inverter 5 (Y = A) that requires an external pullup resistor and sinks up to 8 mA IOL for SN74LS05.
11 5A input Input of inverter 5; for SN74LS05 the datasheet gives VIH of 2 V minimum and VIL of 0.8 V maximum.
12 6Y output Open-collector output of inverter 6 (Y = A) that requires an external pullup resistor and sinks up to 8 mA IOL for SN74LS05.
13 6A input Input of inverter 6; for SN74LS05 the datasheet gives VIH of 2 V minimum and VIL of 0.8 V maximum.
14 VCC power_in Supply voltage for SN74LS05, specified at 4.75 V minimum, 5 V nominal and 5.25 V maximum.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: SN74LS05DR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: sn74ls05dr-etched.step / sn74ls05dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls05dr.step / sn74ls05dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (28 pp, sha256 06bfc733a844b0c4, retrieved 2026-10-10, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF