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XC9536XL-10VQG44C
Public Made by Adomby adom
XILINX Programmable Logic Device (CPLDs/FPGAs), LQFP-44(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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Symbol & Footprint
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README
markdownXC9536XL-10VQG44C
XILINX · Programmable Logic Device (CPLDs/FPGAs) · LQFP-44(10x10)
XC9536XL-10VQG44C from XILINX, in a LQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O/GCK3 | bidirectional | User I/O (FB2... see Function Block 1 macrocell 7) that doubles as global clock input GCK3; 5V-tolerant input. |
| 2 | I/O | bidirectional | User I/O pin (Function Block 1, macrocell 6) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 3 | I/O | bidirectional | User I/O pin (Function Block 1, macrocell 8) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 4 | GND | power_in | Ground pin. |
| 5 | I/O | bidirectional | User I/O pin (Function Block 1, macrocell 9) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 6 | I/O | bidirectional | User I/O pin (Function Block 1, macrocell 10) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 7 | I/O | bidirectional | User I/O pin (Function Block 1, macrocell 11) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 8 | I/O | bidirectional | User I/O pin (Function Block 1, macrocell 12) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 9 | TDI | input | JTAG boundary-scan test data input (IEEE 1149.1). |
| 10 | TMS | input | JTAG boundary-scan test mode select input (IEEE 1149.1). |
| 11 | TCK | input | JTAG boundary-scan test clock input (IEEE 1149.1). |
| 12 | I/O | bidirectional | User I/O pin (Function Block 1, macrocell 13) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 13 | I/O | bidirectional | User I/O pin (Function Block 1, macrocell 14) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 14 | I/O | bidirectional | User I/O pin (Function Block 1, macrocell 15) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 15 | VCCINT | power_in | 3.3V supply for internal logic and input buffers (3.0 V to 3.6 V). |
| 16 | I/O | bidirectional | User I/O pin (Function Block 1, macrocell 16) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 17 | GND | power_in | Ground pin. |
| 18 | I/O | bidirectional | User I/O pin (Function Block 1, macrocell 17) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 19 | I/O | bidirectional | User I/O pin (Function Block 2, macrocell 17) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 20 | I/O | bidirectional | User I/O pin (Function Block 2, macrocell 16) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 21 | I/O | bidirectional | User I/O pin (Function Block 2, macrocell 15) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 22 | I/O | bidirectional | User I/O pin (Function Block 2, macrocell 14) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 23 | I/O | bidirectional | User I/O pin (Function Block 2, macrocell 13) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 24 | TDO | output | JTAG boundary-scan test data output (IEEE 1149.1). |
| 25 | GND | power_in | Ground pin. |
| 26 | VCCIO | power_in | Output driver supply: 3.0 V to 3.6 V for 3.3V operation or 2.3 V to 2.7 V for 2.5V operation. |
| 27 | I/O | bidirectional | User I/O pin (Function Block 2, macrocell 12) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 28 | I/O | bidirectional | User I/O pin (Function Block 2, macrocell 11) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 29 | I/O | bidirectional | User I/O pin (Function Block 2, macrocell 10) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 30 | I/O | bidirectional | User I/O pin (Function Block 2, macrocell 9) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 31 | I/O | bidirectional | User I/O pin (Function Block 2, macrocell 8) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 32 | I/O | bidirectional | User I/O pin (Function Block 2, macrocell 7) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 33 | I/O/GSR | bidirectional | User I/O that doubles as the global set/reset input GSR; 5V-tolerant input. |
| 34 | I/O/GTS2 | bidirectional | User I/O that doubles as global output-enable (3-state) input GTS2; 5V-tolerant input. |
| 35 | VCCINT | power_in | 3.3V supply for internal logic and input buffers (3.0 V to 3.6 V). |
| 36 | I/O/GTS1 | bidirectional | User I/O that doubles as global output-enable (3-state) input GTS1; 5V-tolerant input. |
| 37 | I/O | bidirectional | User I/O pin (Function Block 2, macrocell 4) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 38 | I/O | bidirectional | User I/O pin (Function Block 2, macrocell 2) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 39 | I/O | bidirectional | User I/O pin (Function Block 2, macrocell 1) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 40 | I/O | bidirectional | User I/O pin (Function Block 1, macrocell 1) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 41 | I/O | bidirectional | User I/O pin (Function Block 1, macrocell 2) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 42 | I/O | bidirectional | User I/O pin (Function Block 1, macrocell 4) with 5V-tolerant input and 3.3V or 2.5V output capability. |
| 43 | I/O/GCK1 | bidirectional | User I/O that doubles as global clock input GCK1; 5V-tolerant input. |
| 44 | I/O/GCK2 | bidirectional | User I/O that doubles as global clock input GCK2; 5V-tolerant input. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XILINX |
| Package | LQFP-44(10x10) |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 44 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 4 | V | relative to GND | 3 | |
| Input voltage | VIN | -0.5 | 5.5 | V | relative to GND | 3 | |
| Voltage applied to 3-state output | VTS | -0.5 | 5.5 | V | 3 | ||
| Storage temperature | TSTG | -65 | 150 | °C | ambient | 3 | |
| Junction temperature | TJ | 150 | °C | 3 | |||
| Supply voltage for internal logic and input buffers | VCCINT | 3 | 3.6 | V | Commercial TA = 0°C to 70°C | 3 | |
| Operating ambient temperature (Commercial) | TA | 0 | 70 | °C | Commercial | 3 | |
| Supply voltage for output drivers, 3.3V operation | VCCIO | 3 | 3.6 | V | 3.3V operation | 3 | |
| Supply voltage for output drivers, 2.5V operation | VCCIO | 2.3 | 2.7 | V | 2.5V operation | 3 | |
| Low-level input voltage | VIL | 0 | 0.8 | V | 3 | ||
| High-level input voltage | VIH | 2 | 5.5 | V | 3 | ||
| Output voltage | VO | 0 | V | max printed as VCCIO | 3 | ||
| Data Retention | TDR | 20 | Years | 3 | |||
| Program/Erase Cycles (Endurance) | NPE | 10000 | Cycles | 3 | |||
| Electrostatic Discharge | VESD | 2000 | Volts | 3 | |||
| Output high voltage for 3.3V outputs | VOH | 2.4 | V | IOH = -4.0 mA | 3 | ||
| Output high voltage for 2.5V outputs | VOH | 90 | % of VCCIO | IOH = -500 μA | 3 | ||
| Output low voltage for 3.3V outputs | VOL | 0.4 | V | IOL = 8.0 mA | 3 | ||
| Output low voltage for 2.5V outputs | VOL | 0.4 | V | IOL = 500 μA | 3 | ||
| Input leakage current | IIL | -10 | 10 | μA | VCC = Max; VIN = GND or VCC | 3 | |
| I/O high-Z leakage current | IIH | -10 | 10 | μA | VCC = Max; VIN = GND or VCC | 3 | |
| I/O high-Z leakage current | IIH | -50 | 50 | μA | VCC Min < VIN < 5.5V | 3 | |
| I/O capacitance | CIN | 10 | pF | VIN = GND; f = 1.0 MHz | 3 | ||
| Operating supply current (low power mode, active) | ICC | 10 | mA | VIN = GND, No load; f = 1.0 MHz | 3 | ||
| I/O to output valid | TPD | 10 | ns | XC9536XL-10 | 4 | ||
| I/O setup time before GCK | TSU | 6.5 | ns | XC9536XL-10 | 4 | ||
| I/O hold time after GCK | TH | 0 | ns | XC9536XL-10 | 4 | ||
| GCK to output valid | TCO | 5.8 | ns | XC9536XL-10 | 4 | ||
| Multiple FB internal operating frequency | fSYSTEM | 100 | MHz | XC9536XL-10 | 4 | ||
| I/O setup time before p-term clock input | TPSU | 2.1 | ns | XC9536XL-10 | 4 | ||
| I/O hold time after p-term clock input | TPH | 4.4 | ns | XC9536XL-10 | 4 | ||
| P-term clock output valid | TPCO | 10.2 | ns | XC9536XL-10 | 4 | ||
| GTS to output valid | TOE | 7 | ns | XC9536XL-10 | 4 | ||
| GTS to output disable | TOD | 7 | ns | XC9536XL-10 | 4 | ||
| Product term OE to output enabled | TPOE | 11 | ns | XC9536XL-10 | 4 | ||
| Product term OE to output disabled | TPOD | 11 | ns | XC9536XL-10 | 4 | ||
| GSR to output valid | TAO | 14.5 | ns | XC9536XL-10 | 4 | ||
| P-term S/R to output valid | TPAO | 15.3 | ns | XC9536XL-10 | 4 | ||
| GCK pulse width (High or Low) | TWLH | 4.5 | ns | XC9536XL-10 | 4 | ||
| Asynchronous preset/reset pulse width (High or Low) | TAPRPW | 7 | ns | XC9536XL-10 | 4 | ||
| P-term clock pulse width (High or Low) | TPLH | 7 | ns | XC9536XL-10 | 4 | ||
| Input buffer delay | TIN | 3.5 | ns | XC9536XL-10 | 5 | ||
| GCK buffer delay | TGCK | 1.8 | ns | XC9536XL-10 | 5 | ||
| GSR buffer delay | TGSR | 4.5 | ns | XC9536XL-10 | 5 | ||
| GTS buffer delay | TGTS | 7 | ns | XC9536XL-10 | 5 | ||
| Output buffer delay | TOUT | 3 | ns | XC9536XL-10 | 5 | ||
| Product term clock delay | TPTCK | 2.7 | ns | XC9536XL-10 | 5 | ||
| Product term set/reset delay | TPTSR | 1.8 | ns | XC9536XL-10 | 5 | ||
| Product term 3-state delay | TPTTS | 7.5 | ns | XC9536XL-10 | 5 | ||
| Combinatorial logic propagation delay | TPDI | 1.7 | ns | XC9536XL-10 | 5 | ||
| Register setup time | TSUI | 3 | ns | XC9536XL-10 | 5 | ||
| Register hold time | THI | 3.5 | ns | XC9536XL-10 | 5 | ||
| Register clock to output valid time | TCOI | 1 | ns | XC9536XL-10 | 5 | ||
| Register async. S/R to output delay | TAOI | 7 | ns | XC9536XL-10 | 5 | ||
| Internal logic delay | TLOGI | 1.8 | ns | XC9536XL-10 | 5 | ||
| Fast CONNECT II feedback delay | TF | 4.2 | ns | XC9536XL-10 | 5 | ||
| Incremental product term allocator delay | TPTA | 1 | ns | XC9536XL-10 | 5 | ||
| Slew-rate limited delay | TSLEW | 4.5 | ns | XC9536XL-10 | 5 |
CAD (KiCad official)
- Symbol:
XC9536XL-10VQG44C - Footprint:
Package_QFP:LQFP-44_10x10mm_P0.8mm - 3D model: LQFP-44(10x10) (KiCad packages3D, STEP)
- 3D model files:
xc9536xl-10vqg44c-etched.step/xc9536xl-10vqg44c-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);xc9536xl-10vqg44c.step/xc9536xl-10vqg44c.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XILINX datasheet (10 pp, sha256
addb45f36da49467, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).