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CD4081BPWR

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Texas Instruments Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Datasheet

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Contents

README

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CD4081BPWR

Texas Instruments · Logic Gates · TSSOP-14

CD4081BPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Input A of gate 1 (2-input AND); accepts VIL ≤ 1 V / VIH ≥ 4 V at VDD = 5 V.
2 B input Input B of gate 1 (2-input AND); accepts VIL ≤ 1 V / VIH ≥ 4 V at VDD = 5 V.
3 J output Output of gate 1; J = A·B; output low-level VOL min 0 V, high-level VOH max VDD at VDD = 5 V.
4 K output Output of gate 2; K = C·D; output low-level VOL min 0 V, high-level VOH max VDD at VDD = 5 V.
5 C input Input C of gate 2 (2-input AND); accepts VIL ≤ 1 V / VIH ≥ 4 V at VDD = 5 V.
6 D input Input D of gate 2 (2-input AND); accepts VIL ≤ 1 V / VIH ≥ 4 V at VDD = 5 V.
7 VSS power_in Negative supply / ground reference; 0 V in normal operation.
8 E input Input E of gate 3 (2-input AND); accepts VIL ≤ 1 V / VIH ≥ 4 V at VDD = 5 V.
9 F input Input F of gate 3 (2-input AND); accepts VIL ≤ 1 V / VIH ≥ 4 V at VDD = 5 V.
10 L output Output of gate 3; L = E·F; output low-level VOL min 0 V, high-level VOH max VDD at VDD = 5 V.
11 M output Output of gate 4; M = G·H; output low-level VOL min 0 V, high-level VOH max VDD at VDD = 5 V.
12 G input Input G of gate 4 (2-input AND); accepts VIL ≤ 1 V / VIH ≥ 4 V at VDD = 5 V.
13 H input Input H of gate 4 (2-input AND); accepts VIL ≤ 1 V / VIH ≥ 4 V at VDD = 5 V.
14 VDD power_in Positive supply; operating range 3 V to 18 V; quiescent current 1 µA typ at 20 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: CD4081BPWR
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: cd4081bpwr-etched.step / cd4081bpwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4081bpwr.step / cd4081bpwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (34 pp, sha256 68c6167d1ae45286, retrieved 2026-09-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-4-6 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF