AP4410AGM-VB from VBsemi Elec, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	S	passive	Source terminal of the N-channel MOSFET (pins 1-3 are tied together as source).
2	S	passive	Source terminal of the N-channel MOSFET (pins 1-3 are tied together as source).
3	S	passive	Source terminal of the N-channel MOSFET (pins 1-3 are tied together as source).
4	G	input	Gate terminal with a gate-source voltage limit of ±20 V and a threshold of 1.0 to 3.0 V.
5	D	passive	Drain terminal with a 30 V drain-source rating (pins 5-8 are tied together as drain).
6	D	passive	Drain terminal with a 30 V drain-source rating (pins 5-8 are tied together as drain).
7	D	passive	Drain terminal with a 30 V drain-source rating (pins 5-8 are tied together as drain).
8	D	passive	Drain terminal with a 30 V drain-source rating (pins 5-8 are tied together as drain).

Key specifications

Parameter	Value
Manufacturer	VBsemi Elec
Package	SO-8
Category	Triode/MOS Tube/Transistor
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Drain-Source Voltage	VDS			30	V	TA = 25 °C	1
Gate-Source Voltage	VGS	-20		20	V	TA = 25 °C	1
Pulsed Drain Current	IDM			45	A	TA = 25 °C	1
Avalanche Energy	EAS			21	mJ	L = 0.1 mH	1
Operating Junction and Storage Temperature Range	TJ, Tstg	-55		150	°C		1
Maximum Junction-to-Ambient	RthJA		39	55	°C/W	t ≤ 10 s, surface mounted on 1" x 1" FR4 board	1
Maximum Junction-to-Foot (Drain)	RthJF		25	29	°C/W	Steady State	1
Drain-Source Breakdown Voltage	VDS	30			V	VGS = 0 V, ID = 250 µA	2
Gate-Source Threshold Voltage	VGS(th)	1		3	V	VDS = VGS, ID = 250 µA	2
Gate-Source Leakage	IGSS	-100		100	nA	VDS = 0 V, VGS = ± 20 V	2
Zero Gate Voltage Drain Current	IDSS			1	µA	VDS = 30 V, VGS = 0 V	2
Zero Gate Voltage Drain Current	IDSS			10	µA	VDS = 30 V, VGS = 0 V, TJ = 55 °C	2
On-State Drain Current	ID(on)	20			A	VDS ≥ 5 V, VGS = 10 V	2
Total Gate Charge	Qg		15	23	nC	VDS = 15 V, VGS = 10 V, ID = 10 A	2
Total Gate Charge	Qg		6.8	10.2	nC	VDS = 15 V, VGS = 5 V, ID = 10 A	2
Gate Resistance	Rg	0.36	1.8	3.6	Ω	f = 1 MHz	2
Rise Time	tr		12	16	ns	VDD = 15 V, RL = 1.4 Ω, ID ≅ 9 A, VGEN = 4.5 V, Rg = 1 Ω	2
Turn-Off Delay Time	td(off)		16	22	ns	VDD = 15 V, RL = 1.4 Ω, ID ≅ 9 A, VGEN = 4.5 V, Rg = 1 Ω	2
Fall Time	tf		10	18	ns	VDD = 15 V, RL = 1.4 Ω, ID ≅ 9 A, VGEN = 4.5 V, Rg = 1 Ω	2
Rise Time	tr		10	20	ns	VDD = 15 V, RL = 1.4 Ω, ID ≅ 9 A, VGEN = 10 V, Rg = 1 Ω	2
Body Diode Voltage	VSD		0.8	1.2	V	IS = 9 A	2
Body Diode Reverse Recovery Time	trr		15	30	ns	IF = 9 A, dI/dt = 100 A/µs, TJ = 25 °C	2

CAD (KiCad official)

Symbol: AP4410AGM-VB
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SO-8 (KiCad packages3D, STEP)
3D model files: ap4410agm-vb-etched.step / ap4410agm-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap4410agm-vb.step / ap4410agm-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: VBsemi Elec datasheet (9 pp, sha256 a6815f498db45765, retrieved 2026-10-31, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

AP4410AGM-VB

Verified AP4410AGM-VB

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3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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