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Contents

README

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BC860C

Nexperia · Bipolar (BJT) · SOT-23

BC860C from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 B input Base of the PNP transistor; the base drives the device, and the datasheet gives a device-level base peak current limit of -200 mA (IBM).
2 E passive Emitter of the PNP transistor; the datasheet gives a device-level emitter-base voltage limit of -5 V (VEBO) with the collector open.
3 C passive Collector of the PNP transistor; the datasheet gives a device-level collector current limit of -100 mA (IC) and a collector-emitter voltage limit of -45 V (VCEO, open base).

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-23
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: BC860C
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: bc860c-etched.step / bc860c-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bc860c.step / bc860c.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (8 pp, sha256 2fb224484972a988, retrieved 2026-10-09, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF