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MC10EP51MNTAG

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by adom

onsemi Flip Flops, DFN-8-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icsmc10ep51mntagfactory-2.0.0extractor-text

Verified MC10EP51MNTAG

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 9 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: MC10EP51MNTAG · DFN-8-EP(2x2) · 9 pins
  • ✓copper: 9 copper pads, none touching another net
  • ✓datasheet: all 9 pin names found in the 13-page datasheet
  • ✓distributor: lcsc C899669, digikey 488-MC10EP51MNTAGTR-ND, mouser 863-MC10EP51MNTAG
  • ✓family: DFN-8-1EP_2x2mm_P0.5mm_EP0.6x1.2mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-p8ls_qkk/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height within the datasheet's package drawing (datasheet p.9)
  • ✓pads: 9 pins = 9 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 9 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ mc10ep51mntag.kicad_sym✓ mc10ep51mntag.kicad_mod✓ mc10ep51mntag.step
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3D Model

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Symbol & Footprint

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Contents

README

markdown

MC10EP51MNTAG

onsemi · Flip Flops · DFN-8-EP(2x2)

MC10EP51MNTAG from onsemi, in a DFN-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RESET input ECL asynchronous, level-triggered reset input with internal 75 kΩ pulldown; defaults LOW when left open.
2 D input ECL data input with internal 75 kΩ pulldown; defaults LOW when left open.
3 CLK input Non-inverting ECL clock input; data is transferred to the outputs on a positive transition, and it defaults LOW (pulled to VEE) when left open.
4 CLK̅ input Inverting ECL clock input; biased at VCC/2 when left open, and allows negative-edge-triggered use.
5 VEE power_in Negative supply; VEE = −3.0 V to −5.5 V in NECL mode (VCC = 0 V), or 0 V in PECL mode.
6 Q̅ output Inverted ECL data output.
7 Q output True ECL data output.
8 VCC power_in Positive supply; VCC = 3.0 V to 5.5 V in PECL mode (VEE = 0 V), or 0 V in NECL mode.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer onsemi
Package DFN-8-EP(2x2)
Category Logic ICs
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
PECL Mode Operating Range (VCC) VCC 3 5.5 V VEE = 0 V 1
NECL Mode Operating Range (VEE) VEE -5.5 -3 V VCC = 0 V 1
PECL Mode Power Supply VCC 6 V VEE = 0 V 3
NECL Mode Power Supply VEE -6 V VCC = 0 V 3
PECL Mode Input Voltage VI 6 V VEE = 0 V 3
NECL Mode Input Voltage VI -6 V VCC = 0 V 3
Output Current Continuous Iout 50 mA 3
Output Current Surge Iout 100 mA 3
Operating Temperature Range TA -40 85 °C 3
Storage Temperature Range Tstg -65 150 °C 3
Wave Solder Pb-Free Tsol 265 °C Pb-Free 3
Power Supply Current, PECL 3.3 V IEE 26 35 45 mA VCC = 3.3 V, VEE = 0 V; 25°C 3
Output HIGH Voltage, PECL 3.3 V VOH 2230 2355 2480 mV VCC = 3.3 V, VEE = 0 V; 25°C; Note 4 3
Output LOW Voltage, PECL 3.3 V VOL 1430 1555 1680 mV VCC = 3.3 V, VEE = 0 V; 25°C; Note 4 3
Input HIGH Voltage (Single-Ended), PECL 3.3 V VIH 2155 2480 mV VCC = 3.3 V, VEE = 0 V; 25°C 3
Input LOW Voltage (Single-Ended), PECL 3.3 V VIL 1430 1755 mV VCC = 3.3 V, VEE = 0 V; 25°C 3
Input HIGH Voltage Common Mode Range (Differential), PECL 3.3 V VIHCMR 2 3.3 V VCC = 3.3 V, VEE = 0 V; 25°C; Note 5 3
Input HIGH Current, PECL 3.3 V IIH 150 µA 3
Input LOW Current, PECL 3.3 V IIL 0.5 µA 3
Power Supply Current, PECL 5.0 V IEE 26 35 45 mA VCC = 5.0 V, VEE = 0 V; 25°C 4
Output HIGH Voltage, PECL 5.0 V VOH 3930 4055 4180 mV VCC = 5.0 V, VEE = 0 V; 25°C; Note 7 4
Output LOW Voltage, PECL 5.0 V VOL 3130 3255 3380 mV VCC = 5.0 V, VEE = 0 V; 25°C; Note 7 4
Input HIGH Voltage (Single-Ended), PECL 5.0 V VIH 3855 4180 mV VCC = 5.0 V, VEE = 0 V; 25°C 4
Input LOW Voltage (Single-Ended), PECL 5.0 V VIL 3130 3455 mV VCC = 5.0 V, VEE = 0 V; 25°C 4
Input HIGH Voltage Common Mode Range (Differential), PECL 5.0 V VIHCMR 2 5 V VCC = 5.0 V, VEE = 0 V; 25°C; Note 8 4
Input HIGH Current, PECL 5.0 V IIH 150 µA 4
Input LOW Current, PECL 5.0 V IIL 0.5 µA 4
Power Supply Current, NECL (first row) IEE 23 30 40 mA VCC = 0 V, VEE = -5.5 V to -3.0 V; 25°C 4
Power Supply Current, NECL (second row) IEE 26 35 45 mA VCC = 0 V, VEE = -5.5 V to -3.0 V; 25°C 4
Output HIGH Voltage, NECL VOH -1070 -945 -820 mV VCC = 0 V, VEE = -5.5 V to -3.0 V; 25°C; Note 10 4
Output LOW Voltage, NECL VOL -1870 -1745 -1620 mV VCC = 0 V, VEE = -5.5 V to -3.0 V; 25°C; Note 10 4
Input HIGH Voltage (Single-Ended), NECL VIH -1145 -820 mV VCC = 0 V, VEE = -5.5 V to -3.0 V; 25°C 4
Input LOW Voltage (Single-Ended), NECL VIL -1870 -1545 mV VCC = 0 V, VEE = -5.5 V to -3.0 V; 25°C 4
Input HIGH Voltage Common Mode Range (Differential), NECL VIHCMR 0 V VCC = 0 V; 25°C; Note 11 4
Input HIGH Current, NECL IIH 150 µA 4
Input LOW Current, NECL IIL 0.5 µA 4
Output HIGH Voltage, PECL 3.3 V VOH 2165 2290 2415 mV VCC = 3.3 V, VEE = 0 V; -40°C; Note 4 3
Output LOW Voltage, PECL 3.3 V VOL 1365 1490 1615 mV VCC = 3.3 V, VEE = 0 V; -40°C; Note 4 3
Output HIGH Voltage, PECL 3.3 V VOH 2290 2415 2540 mV VCC = 3.3 V, VEE = 0 V; 85°C; Note 4 3
Output LOW Voltage, PECL 3.3 V VOL 1490 1615 1740 mV VCC = 3.3 V, VEE = 0 V; 85°C; Note 4 3
Output HIGH Voltage, PECL 5.0 V VOH 3865 3990 4115 mV VCC = 5.0 V, VEE = 0 V; -40°C; Note 7 4
Output LOW Voltage, PECL 5.0 V VOL 3065 3190 3315 mV VCC = 5.0 V, VEE = 0 V; -40°C; Note 7 4
Output HIGH Voltage, PECL 5.0 V VOH 3990 4115 4240 mV VCC = 5.0 V, VEE = 0 V; 85°C; Note 7 4
Output LOW Voltage, PECL 5.0 V VOL 3190 3315 3440 mV VCC = 5.0 V, VEE = 0 V; 85°C; Note 7 4
Output HIGH Voltage, NECL VOH -1135 -1010 -885 mV VCC = 0 V, VEE = -5.5 V to -3.0 V; -40°C; Note 10 4
Output LOW Voltage, NECL VOL -1935 -1810 -1685 mV VCC = 0 V, VEE = -5.5 V to -3.0 V; -40°C; Note 10 4
Output HIGH Voltage, NECL VOH -1010 -885 -760 mV VCC = 0 V, VEE = -5.5 V to -3.0 V; 85°C; Note 10 4
Output LOW Voltage, NECL VOL -1810 -1685 -1560 mV VCC = 0 V, VEE = -5.5 V to -3.0 V; 85°C; Note 10 4
Maximum Frequency fmax 3 GHz Figure 2; 25°C; printed as > 3 6
Propagation Delay CLK, CLK to Q, Q (10EP) tPLH, tPHL 300 340 380 ps 25°C; Note 21 6
Propagation Delay RESET to Q, Q tPLH, tPHL 350 425 425 ps 25°C; Note 21 6
Reset Recovery tRR 150 ps 25°C 6
Cycle-to-Cycle Jitter tJITTER 0.2 1 ps Figure 2; printed as < 1 6
Output Rise/Fall Times Q, Q tr, tf 80 130 180 ps 20%-80%; 25°C 6
Thermal Resistance Junction-to-Ambient, DFN8, 0 lfpm JA 129 °C/W 0 lfpm 3
Thermal Resistance Junction-to-Ambient, DFN8, 500 lfpm JA 84 °C/W 500 lfpm 3
Thermal Resistance Junction-to-Case, DFN8 JC 35 40 °C/W Note 2; JEDEC 2S2P board 3
Internal Input Pulldown Resistor 75 k 2

CAD (KiCad official)

  • Symbol: MC10EP51MNTAG
  • Footprint: Package_DFN_QFN:DFN-8-1EP_2x2mm_P0.5mm_EP0.6x1.2mm
  • 3D model: DFN-8-EP(2x2) (KiCad packages3D, STEP)
  • 3D model files: mc10ep51mntag-etched.step / mc10ep51mntag-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc10ep51mntag.step / mc10ep51mntag.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (13 pp, sha256 39ac7db8b12988eb, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF