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Contents

README

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MCP2562-E

Microchip Tech · CAN ICs · SOIC-8

MCP2562-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TXD input Transmit Data Input: when TXD is Low, CANH and CANL are Dominant, and when High they are Recessive unless another node drives a Dominant state; it has an internal pull-up of nominal 33 k to VIO on the MCP2562.
2 VSS power_in Ground supply pin.
3 VDD power_in Positive supply voltage pin that supplies the transmitter and receiver, including the wake-up receiver.
4 RXD output CMOS-compatible Receive Data Output that is High when the CAN bus is Recessive and Low when Dominant, supplied by VIO on the MCP2562.
5 VIO power_in Supply for the digital I/O pins (TXD, RXD and STBY) on the MCP2562 only, with the I/O supply internally connected to VDD on the MCP2561.
6 CANL bidirectional CAN Low-Level Voltage I/O that drives the Low side of the CAN differential bus and disconnects from the bus when the device is not powered.
7 CANH bidirectional CAN High-Level Voltage I/O that drives the High side of the CAN differential bus and disconnects from the bus when the device is not powered.
8 STBY input Standby Mode Input that selects Normal mode when Low and Standby mode when High, with an internal MOS pull-up to VIO on the MCP2562.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDD Pin Voltage Range VDD 4.5 5.5 V 9
Supply Current (Recessive) IDD 5 10 mA Recessive; VTXD = VDD 9
Supply Current (Dominant) IDD 45 70 mA Dominant; VTXD = 0V 9
Standby Current (MCP2562) IDDS 5 15 µA MCP2562; Includes IIO 9
High Level of the POR Comparator VPORH 3.8 4.3 V 9
Low Level of the POR Comparator VPORL 3.4 4 V 9
Digital Supply Voltage Range (VIO) VIO 1.8 5.5 V 9
Supply Current on VIO (Recessive) IIO 4 30 µA Recessive; VTXD = VIO 9
Supply Current on VIO (Dominant) IIO 85 500 µA Dominant; VTXD = 0V 9
Recessive Bus Output Voltage VO(R) 2 3 V VTXD = VDD; No load 9
Recessive Output Current IO(R) -5 5 mA -24V < VCAN < +24V 9
CANH Dominant Output Voltage VO(D) 2.75 3.5 4.5 V TXD = 0; RL = 50 to 65 9
CANL Dominant Output Voltage VO(D) 0.5 1.5 2.25 V RL = 50 to 65 9
Symmetry of Dominant Output Voltage (VDD - VCANH - VCANL) VO(D)(M) -400 0 400 mV VTXD = VSS (Note 1) 9
Dominant Differential Output Voltage VO(DIFF) 1.5 2 3 V VTXD = VSS; RL = 50 to 65 9
Recessive Differential Output Voltage -120 0 12 mV VTXD = VDD 9
Recessive Differential Output Voltage (no load) -500 0 50 mV VTXD = VDD, no load. 9
CANH Short Circuit Output Current IO(SC) -120 -85 mA VTXD = VSS; VCANH = 0V; CANL: floating 10
CANH Short Circuit Output Current (VDD=5V, TAMB=+25°C) IO(SC) -100 mA same as above, but VDD=5V, TAMB = +25°C (Note 1) 10
CANL Short Circuit Output Current IO(SC) 75 120 mA VTXD = VSS; VCANL = 18V; CANH: floating 10
CANL Short Circuit Output Current (VDD=5V, TAMB=+25°C) IO(SC) 100 mA same as above, but VDD=5V, TAMB = +25°C (Note 1) 10
Recessive Differential Input Voltage (Normal Mode) VDIFF(R)(I) -1 0.5 V Normal Mode; -12V < V(CANH, CANL) < +12V; See Figure 2-6 (Note 3) 10
Recessive Differential Input Voltage (Standby Mode) VDIFF(R)(I) -1 0.4 V Standby Mode; -12V < V(CANH, CANL) < +12V; See Figure 2-6 (Note 3) 10
Dominant Differential Input Voltage (Normal Mode) VDIFF(D)(I) 0.9 V Normal Mode; -12V < V(CANH, CANL) < +12V; See Figure 2-6 (Note 3) 10
Dominant Differential Input Voltage (Standby Mode) VDIFF(D)(I) 1 V Standby Mode; -12V < V(CANH, CANL) < +12V; See Figure 2-6 (Note 3) 10
Differential Receiver Threshold (Normal Mode) VTH(DIFF) 0.5 0.7 0.9 V Normal Mode; -12V < V(CANH, CANL) < +12V; See Figure 2-6 (Note 3) 10
Differential Receiver Threshold (Standby Mode) VTH(DIFF) 0.4 1.15 V Standby Mode; -12V < V(CANH, CANL) < +12V; See Figure 2-6 (Note 3) 10
Differential Input Hysteresis VHYS(DIFF) 50 200 mV Normal mode, see Figure 2-6, (Note 1) 10
Common Mode Input Resistance RIN 10 30 k (Note 1) 10
Differential Input Resistance RIN(DIFF) 10 100 k (Note 1) 10
Common Mode Input Capacitance CIN(CM) 20 pF VTXD = VDD; (Note 1) 10
Differential Input Capacitance CIN(DIFF) 10 VTXD = VDD; (Note 1) 10
CANH, CANL Input Leakage ILI -5 5 µA VDD = VTXD = VSTBY = 0V. For MCP2562, VIO = 0V. VCANH = VCANL = 5 V. 10
Low-Level Input Voltage (TXD, STBY) VIL -0.3 V 11
High-Level Input Current IIH -1 1 µA 11
TXD Low-Level Input Current IIL(TXD) -270 -150 -30 µA 11
STBY Low-Level Input Current IIL(STBY) -30 -1 µA 11
Low-Level Output Voltage (RXD) VOL 0.4 V IOL = 4 mA; typical 8 mA 11
Shutdown Junction Temperature TJ(SD) 165 175 185 °C -12V < V(CANH, CANL) < +12V, (Note 1) 11
Shutdown Temperature Hysteresis TJ(HYST) 20 30 °C -12V < V(CANH, CANL) < +12V, (Note 1) 11
Bus Fault Output Bit Frequency fBIT 14.4 1000 kHz 13
Delay TXD Low to Bus Dominant tTXD-BUSON 70 ns 13
Delay TXD High to Bus Recessive tTXD-BUSOFF 125 ns 13
Delay Bus Dominant to RXD tBUSON-RXD 70 ns 13
Delay Bus Recessive to RXD tBUSOFF-RXD 110 ns 13
Propagation Delay TXD to RXD (negative edge) tTXD - RXD 125 ns Negative edge on TXD 13
Propagation Delay TXD to RXD (positive edge) 235 ns Positive edge on TXD 13
Delay Bus Dominant to RXD (Standby mode) tFLTR(WAKE) 0.5 1 4 µs Standby mode 13
Delay Standby to Normal Mode tWAKE 5 25 40 µs Negative edge on STBY 13
Supply Voltage (VDD) Absolute Maximum VDD 7 V 8
Digital Supply Voltage (VIO) Absolute Maximum VIO 7 V 8
DC Voltage at CANH, CANL and SPLIT -58 58 V SPLIT pin applies to MCP2561 only 8
Transient Voltage on CANH, CANL (ISO-7637) -150 100 V ISO-7637 (Figure 2-5) 8
Storage Temperature -55 150 °C 8
Operating Ambient Temperature -40 150 °C 8
Virtual Junction Temperature (TVJ) TVJ -40 190 °C IEC60747-1 8
Specified Temperature Range (E) TA -40 125 °C 16
Operating Temperature Range TA -40 150 °C 16
Storage Temperature Range TA -65 155 °C 16
Thermal Resistance, 8L-SOIC JA 149.5 C/W 16

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin P = Plastic Dual In-Line - 300 mil Body, 8-lead SN = Plastic Small Outline - Narrow, 3.90 mm Body, 27

CAD (KiCad official)

  • Symbol: MCP2562-E
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: mcp2562-e-etched.step / mcp2562-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp2562-e.step / mcp2562-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (30 pp, sha256 c36b24e45446d8a1, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF