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Contents

README

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ATMEGA16M1-MU

Microchip Tech · Pre-ordered MCUs · QFN-32-EP(7x7)

ATMEGA16M1-MU from Microchip Tech, in a QFN-32-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PD2 bidirectional Port D bit 2 is a bidirectional I/O pin with internal pull-up, also serving OC1A, PSCIN2, MISO_A and PCINT18 alternate functions.
2 PD3 bidirectional Port D bit 3 is a bidirectional I/O pin with internal pull-up, also serving TXD, TXLIN, OC0A, SS, MOSI_A and PCINT19 alternate functions.
3 PC1 bidirectional Port C bit 1 is a bidirectional I/O pin with internal pull-up, also serving PSCIN1, OC1B, SS_A and PCINT9 alternate functions.
4 VCC power_in Digital supply voltage pin, which must be externally connected to the supply and should be operated within 2.7V to 5.5V.
5 GND power_in Ground pin serving as the 0V digital reference.
6 PC2 bidirectional Port C bit 2 is a bidirectional I/O pin with internal pull-up, also serving T0 clock input, TXCAN and PCINT10 alternate functions.
7 PC3 bidirectional Port C bit 3 is a bidirectional I/O pin with internal pull-up, also serving T1 clock input, RXCAN, ICP1B and PCINT11 alternate functions.
8 PB0 bidirectional Port B bit 0 is a bidirectional I/O pin with internal pull-up, also serving MISO, PSCOUT2A and PCINT0 alternate functions.
9 PB1 bidirectional Port B bit 1 is a bidirectional I/O pin with internal pull-up, also serving MOSI, PSCOUT2B and PCINT1 alternate functions.
10 PE1 bidirectional Port E bit 1 is a bidirectional I/O pin with internal pull-up that can serve as XTAL1, the input to the inverting oscillator amplifier, depending on clock fuse settings.
11 PE2 bidirectional Port E bit 2 is a bidirectional I/O pin with internal pull-up that can serve as XTAL2, the output of the inverting oscillator amplifier, depending on clock fuse settings.
12 PD4 bidirectional Port D bit 4 is a bidirectional I/O pin with internal pull-up, also serving ADC1, RXD, RXLIN, ICP1A, SCK_A and PCINT20 alternate functions.
13 PD5 bidirectional Port D bit 5 is a bidirectional I/O pin with internal pull-up, also serving ADC2, ACMP2 and PCINT21 alternate functions.
14 PD6 bidirectional Port D bit 6 is a bidirectional I/O pin with internal pull-up, also serving ADC3, ACMPN2, INT0 and PCINT22 alternate functions.
15 PD7 bidirectional Port D bit 7 is a bidirectional I/O pin with internal pull-up, also serving ACMP0 and PCINT23 alternate functions.
16 PB2 bidirectional Port B bit 2 is a bidirectional I/O pin with internal pull-up, also serving ADC5, INT1, ACMPN0 and PCINT2 alternate functions.
17 PC4 bidirectional Port C bit 4 is a bidirectional I/O pin with internal pull-up, also serving ADC8, AMP1-, ACMPN3 and PCINT12 alternate functions.
18 PC5 bidirectional Port C bit 5 is a bidirectional I/O pin with internal pull-up, also serving ADC9, AMP1+, ACMP3 and PCINT13 alternate functions.
19 AVCC power_in Analog supply voltage pin for the A/D converter, D/A converter and current source, which should be connected to VCC even if the ADC and DAC are not used.
20 AGND power_in Analog ground pin serving as the 0V reference for the analog part.
21 AREF power_in Analog reference pin that is the reference voltage of the A/D converter and can also be used as an output by external analog circuitry.
22 PC6 bidirectional Port C bit 6 is a bidirectional I/O pin with internal pull-up, also serving ADC10, ACMP1 and PCINT14 alternate functions.
23 PB3 bidirectional Port B bit 3 is a bidirectional I/O pin with internal pull-up, also serving the AMP0- differential amplifier negative input and PCINT3 alternate functions.
24 PB4 bidirectional Port B bit 4 is a bidirectional I/O pin with internal pull-up, also serving the AMP0+ differential amplifier positive input and PCINT4 alternate functions.
25 PC7 bidirectional Port C bit 7 is a bidirectional I/O pin with internal pull-up, also serving D2A DAC output, AMP2+ and PCINT15 alternate functions.
26 PB5 bidirectional Port B bit 5 is a bidirectional I/O pin with internal pull-up, also serving ADC6, INT2, ACMPN1, AMP2- and PCINT5 alternate functions.
27 PB6 bidirectional Port B bit 6 is a bidirectional I/O pin with internal pull-up, also serving ADC7, PSCOUT1B and PCINT6 alternate functions.
28 PB7 bidirectional Port B bit 7 is a bidirectional I/O pin with internal pull-up, also serving ADC4, PSCOUT0B, SCK and PCINT7 alternate functions.
29 PD0 bidirectional Port D bit 0 is a bidirectional I/O pin with internal pull-up, also serving PSCOUT0A and PCINT16 alternate functions.
30 PC0 bidirectional Port C bit 0 is a bidirectional I/O pin with internal pull-up, also serving PSCOUT1A, INT3 and PCINT8 alternate functions.
31 PE0 bidirectional Port E bit 0 is an I/O pin that serves as the RESET input when the RSTDISBL fuse is unprogrammed, with a low level longer than the minimum pulse length generating a reset, and also serves OCD and PCINT24.
32 PD1 bidirectional Port D bit 1 is a bidirectional I/O pin with internal pull-up, also serving PSCIN0, CLKO and PCINT17 alternate functions.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFN-32-EP(7x7)
Category Embedded Processors & Controllers
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating voltage 2.7 5.5 V 2
Extended operating temperature -40 85 °C 2
Core speed grade 8 MHz 2.7 - 4.5V 2
Core speed grade 16 MHz 4.5 - 5.5V 2
Current source (LIN node identification) tolerance -2 2 % 2
Current source (LIN node identification) current 100 μA 2

CAD (KiCad official)

  • Symbol: ATMEGA16M1-MU
  • Footprint: Package_DFN_QFN:QFN-32-1EP_7x7mm_P0.65mm_EP4.7x4.7mm
  • 3D model: QFN-32-EP(7x7) (KiCad packages3D, STEP)
  • 3D model files: atmega16m1-mu-etched.step / atmega16m1-mu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega16m1-mu.step / atmega16m1-mu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (18 pp, sha256 dc674c6bd1b9753c, retrieved 2026-11-02, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF