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Contents

README

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REG113NA-3.3

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

REG113NA-3.3 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Supply input voltage with operating range 1.8V to 10V for normal regulation operation.
2 GND power_in Ground reference.
3 Enable input Digital enable input, active high, TTL/CMOS compatible; output enabled when voltage ≥ 1.8V, disabled when voltage ≤ 0.5V.
4 NR output Noise reduction output connected to internal reference voltage; connect 0.01µF capacitor to ground to form low-pass filter for noise reduction.
5 VOUT output Regulated 3.3V output voltage with ±1.5% maximum accuracy, capable of 500mA peak output current.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

CAD (KiCad official)

  • Symbol: REG113NA-3.3
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: reg113na-3-3-etched.step / reg113na-3-3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); reg113na-3-3.step / reg113na-3-3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (22 pp, sha256 c0da90b6895895f3, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF