component
TPS2115PWR
Public Made by Adomby adom
Texas Instruments Signal Switches / Encoders & Decoders / Multiplexers, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS2115PWR
Texas Instruments · Signal Switches / Encoders & Decoders / Multiplexers · TSSOP-8
TPS2115PWR from Texas Instruments, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | STAT | output | Open-drain status output that is Hi-Z when the IN2 switch is on and pulls low when the IN1 switch is on or OUT is Hi-Z, with a maximum output sink current of 5 mA. |
| 2 | D0 | input | TTL and CMOS compatible control input with a 1-µA pullup, where VIH is 2 V minimum, VIL is 0.7 V maximum, and the input voltage range is 0 V to 5.5 V. |
| 3 | D1 | input | TTL and CMOS compatible control input with a 1-µA pullup that, together with D0, selects auto-switching mode (D0 = 1, D1 = 0) or manual switching, with an input voltage range of 0 V to 5.5 V. |
| 4 | ILIM | input | A resistor R(ILIM) from ILIM to GND sets the TPS2115 current limit to 500/R(ILIM), with a current limit adjustment range of 0.63 A to 1.25 A, and R(ILIM) must not be set to zero because that disables current limiting. |
| 5 | GND | power_in | Ground reference; all voltages on the device are specified with respect to GND. |
| 6 | IN2 | power_in | Secondary power switch input over the 2.8 V to 5.5 V operating range, which can be enabled only when the IN2 supply is above its UVLO threshold and at least one supply exceeds the internal VDD UVLO. |
| 7 | OUT | power_out | Power switch output, rated for a continuous output current of 1.5 A for the TPS2115 with absolute maximum voltage of -0.3 V to 6 V. |
| 8 | IN1 | power_in | Primary power switch input over the 2.8 V to 5.5 V operating range, which can be enabled only when the IN1 supply is above its UVLO threshold and at least one supply exceeds the internal VDD UVLO. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-8 |
| Category | Logic ICs |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPS2115PWR - Footprint:
Package_SO:TSSOP-8_3x3mm_P0.65mm - 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
tps2115pwr-etched.step/tps2115pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps2115pwr.step/tps2115pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
469b27c237157439, retrieved 2026-10-08, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).