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README

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AD8400ARZ100-REEL

Analog Devices · Digital Potentiometers · SOIC-8-150mil

AD8400ARZ100-REEL from Analog Devices, in a SOIC-8-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 B1 passive Terminal B of the variable resistor (RDAC); terminal voltages VA, VB and VW must stay between GND and VDD (0 V to VDD per the absolute maximum ratings).
2 GND power_in Ground reference for the device; VDD to GND is rated from -0.3 V to +8 V.
3 CS input Active-low chip select; when CS returns high, the data in the serial input register is decoded from its address bits and loaded into the target DAC register.
4 SDI input Serial data input to the 10-bit serial input register, which holds 2 address bits followed by 8 data bits.
5 CLK input Serial clock input, positive-edge triggered; the device supports a 10 MHz update data loading rate.
6 VDD power_in Positive power supply, specified for operation at both 3 V and 5 V (2.7 V to 5.5 V single-supply operation; absolute maximum VDD to GND is +8 V).
7 W1 passive Wiper of the variable resistor (RDAC 1); the datasheet labels its address as 002 in Table 7.
8 A1 passive Terminal A of the variable resistor (RDAC); terminal voltages must stay between GND and VDD, and the continuous current limit for IAB at 100 kΩ is ±540 µA.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8-150mil
Category Data Acquisition
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Nominal resistance (end-to-end) RAB, 100 kΩ version RAB 70 100 130 kΩ TA = 25°C, model AD840XYY100 6
Resistor differential nonlinearity R-DNL R-DNL -1 1 LSB RWB, VA = No Connect 6
Resistor nonlinearity R-INL R-INL -2 2 LSB RWB, VA = No Connect 6
Nominal resistance match ΔR/RAB ΔR/RAB 0.2 1 % CH 1 to CH 2, CH 3, or CH 4, VAB = VDD, TA = 25°C 6
Wiper resistance RW (5 V) RW 50 100 Ω VDD = 5 V, IW = VDD/RAB 6
Wiper resistance RW (3 V) RW 200 Ω VDD = 3 V, IW = VDD/RAB 6
Integral nonlinearity INL INL -4 4 LSB 6
Differential nonlinearity DNL (VDD = 5 V) DNL -1 1 LSB VDD = 5 V 6
Differential nonlinearity DNL (VDD = 3 V, 25°C) DNL -1 1 LSB VDD = 3 V, TA = 25°C 6
Differential nonlinearity DNL (VDD = 3 V, −40 to +85°C) DNL -1.5 1.5 LSB VDD = 3 V, TA = −40°C to +85°C 6
Full-scale error VWFSE VWFSE -1 -0.25 0 LSB Code = FFH 6
Zero-scale error VWZSE VWZSE 0 0.1 1 LSB Code = 00H 6
Power supply range VDD 2.7 5.5 V VDD range 6
Supply current (CMOS) IDD 0.01 5 μA VIH = VDD or VIL = 0 V 6
Supply current (TTL) IDD 0.9 4 mA VIH = 2.4 V or 0.8 V, VDD = 5.5 V 6
Power supply sensitivity (5 V ±10%) PSS 0.0002 0.001 %/% VDD = 5 V ± 10% 6
Power supply sensitivity (3 V ±10%) PSS 0.006 0.03 %/% VDD = 3 V ± 10% 6
Input logic high VIH (5 V) VIH 2.4 V VDD = 5 V 6
Input logic low VIL (5 V) VIL 0.8 V VDD = 5 V 6
Input logic high VIH (3 V) VIH 2.1 V VDD = 3 V 6
Input logic low VIL (3 V) VIL 0.6 V VDD = 3 V 6
Output logic low VOL VOL 0.4 V IOL = 1.6 mA, VDD = 5 V 6
Input current IIL IIL -1 1 μA VIN = 0 V or 5 V, VDD = 5 V 6
Shutdown current IA_SD IA_SD 0.01 5 μA VA = VDD, VB = 0 V, SHDN = 0 6
Shutdown wiper resistance RW_SD RW_SD 100 200 Ω VA = VDD, VB = 0 V, SHDN = 0, VDD = 5 V 6
Power dissipation (CMOS) PDISS PDISS 27.5 μW VIH = VDD or VIL = 0 V, VDD = 5.5 V 6
Resistance tempco ΔRAB/ΔT ΔRAB/ΔT 500 ppm/°C VAB = VDD, wiper = no connect 6
Voltage divider tempco ΔVW/ΔT ΔVW/ΔT 15 ppm/°C Code = 80H 6
Capacitance Ax, Bx CA, CB 15 pF f = 1 MHz, measured to GND, code = 80H 6
Capacitance Wx CW 80 pF f = 1 MHz, measured to GND, code = 80H 6
Input capacitance CIL 5 pF 6
Bandwidth −3 dB (100 kΩ) BW_100K 71 kHz R = 100 kΩ 7
Total harmonic distortion THDW THDW 0.003 % VA = 1 V rms + 2 V dc, VB = 2 V dc, f = 1 kHz 7
VW settling time (100 kΩ) tS_100K 18 μs VA = VDD, VB = 0 V, ±1% error band 7
Resistor noise voltage eNWB (100 kΩ) eNWB_100K 29 nV/√Hz RWB = 50 kΩ, f = 1 kHz, RS = 0 7
Crosstalk CT CT -65 dB VA = VDD, VB = 0 V 7
Input clock pulse width tCH, tCL tCH, tCL 10 ns Clock level high or low 10
Data setup time tDS tDS 5 ns 10
Data hold time tDH tDH 5 ns 10
CLK to SDO propagation delay tPD tPD 1 25 ns RL = 1 kΩ to 5 V, CL ≤ 20 pF 10
CS setup time tCSS tCSS 10 ns 10
CS high pulse width tCSW tCSW 10 ns 10
Reset pulse width tRS tRS 50 ns 10
CLK fall to CS rise hold time tCSH tCSH 0 ns 10
CS rise to clock rise setup tCS1 tCS1 10 ns 10
VDD to GND VDD -0.3 8 V 11
VA, VB, VW to GND VA, VB, VW 0 V 11
Digital input and output voltage to GND 0 7 V 11
Maximum current IWB pulsed IWB, IWA -20 20 mA Pulsed 11
Maximum current IWB continuous IWB -5 5 mA RWB ≤ 1 kΩ, A open 11
Maximum current IWA continuous IWA -5 5 mA RWA ≤ 1 kΩ, B open 11
Maximum current IAB continuous (100 kΩ) IAB -540 540 μA RAB = 100 kΩ 11
Operating temperature range TA -40 125 °C 11
Maximum junction temperature TJ 150 °C 11
Storage temperature TSTG -65 150 °C 11
Lead temperature (soldering) 300 °C 10 sec 11
Thermal resistance θJA, SOIC (R-8) θJA 158 °C/W SOIC (R-8) 11

CAD (KiCad official)

  • Symbol: AD8400ARZ100-REEL
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8-150mil (KiCad packages3D, STEP)
  • 3D model files: ad8400arz100-reel-etched.step / ad8400arz100-reel-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad8400arz100-reel.step / ad8400arz100-reel.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (32 pp, sha256 c51edf50aaea939c, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF