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STM32L433CBT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32L433CBT6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
STM32L433CBT6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup-domain supply, 1.55 V to 3.6 V, powering the RTC and 32x32-bit backup registers (200 nA in VBAT mode). |
| 2 | PC13 | bidirectional | 5 V tolerant I/O (FT) supplied through the power switch, which sinks only 3 mA, so output speed is limited to 2 MHz at 30 pF and the pin must not source current such as driving an LED; alternate functions include EVENTOUT, with RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2 as additional functions. |
| 3 | PC14-OSC32_IN (PC14) | bidirectional | 5 V tolerant I/O (FT) with the same power-switch limits as PC13 (3 mA, 2 MHz at 30 pF max output), also used as OSC32_IN for the 32.768 kHz LSE crystal. |
| 4 | PC15-OSC32_OUT (PC15) | bidirectional | 5 V tolerant I/O (FT) with the same power-switch limits as PC13 (3 mA, 2 MHz at 30 pF max output), also used as OSC32_OUT for the 32.768 kHz LSE crystal. |
| 5 | PH0-OSC_IN (PH0) | bidirectional | 5 V tolerant I/O (FT) that serves as OSC_IN, the input of the 4 to 48 MHz crystal oscillator (HSE). |
| 6 | PH1-OSC_OUT (PH1) | bidirectional | 5 V tolerant I/O (FT) that serves as OSC_OUT, the output of the 4 to 48 MHz crystal oscillator (HSE). |
| 7 | NRST | bidirectional | Bidirectional reset pin (RST type) with an embedded weak pull-up resistor. |
| 8 | VSSA/VREF- | power_in | Analog ground, which also serves as the ADC negative reference VREF- (internally connected to VSSA on this package). |
| 9 | VDDA/VREF+ | power_in | Analog supply (1.62 V to 3.6 V when ADC or COMP is used, 1.8 V for DAC or OPAMP) that also serves as the ADC positive reference VREF+ (internally connected to VDDA on this package). |
| 10 | PA0 | bidirectional | 5 V tolerant analog-capable I/O (FT_a) with TIM2_CH1, USART2_CTS, COMP1_OUT, SAI1_EXTCLK and TIM2_ETR alternate functions, and ADC1_IN5, OPAMP1_VINP, COMP1_INM and RTC_TAMP2/WKUP1 as additional functions. |
| 11 | PA1 | bidirectional | 5 V tolerant I/O (FT_la) with TIM2_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS_DE and LCD_SEG0 alternate functions, and ADC1_IN6, OPAMP1_VINM and COMP1_INP as additional functions; supplied for analog switch use by VDDA. |
| 12 | PA2 | bidirectional | 5 V tolerant I/O (FT_la) with TIM2_CH3, USART2_TX, LPUART1_TX, QUADSPI_BK1_NCS and LCD_SEG1 alternate functions, and ADC1_IN7, COMP2_INM and WKUP4/LSCO as additional functions. |
| 13 | PA3 | bidirectional | 3.6 V tolerant I/O (TT_la) with TIM2_CH4, USART2_RX, LPUART1_RX, QUADSPI_CLK and LCD_SEG2 alternate functions, and ADC1_IN8, OPAMP1_VOUT and COMP2_INP as additional functions. |
| 14 | PA4 | bidirectional | 3.6 V tolerant analog I/O (TT_a) with SPI1_NSS, SPI3_NSS, USART2_CK and LPTIM2_OUT alternate functions, and ADC1_IN9 and DAC1_OUT1 as additional functions; injected current is limited to -5/0 mA. |
| 15 | PA5 | bidirectional | 3.6 V tolerant analog I/O (TT_a) with TIM2_CH1, TIM2_ETR, SPI1_SCK and LPTIM2_ETR alternate functions, and ADC1_IN10 and DAC1_OUT2 as additional functions; injected current is limited to -5/0 mA. |
| 16 | PA6 | bidirectional | 5 V tolerant I/O (FT_la) with TIM1_BKIN, SPI1_MISO, USART3_CTS, LPUART1_CTS, QUADSPI_BK1_IO3 and LCD_SEG3 alternate functions, and ADC1_IN11 as an additional function. |
| 17 | PA7 | bidirectional | 5 V tolerant I/O (FT_fla) with TIM1_CH1N, I2C3_SCL, SPI1_MOSI, QUADSPI_BK1_IO2 and LCD_SEG4 alternate functions, and ADC1_IN12 as an additional function. |
| 18 | PB0 | bidirectional | 5 V tolerant I/O (FT_la) with TIM1_CH2N, SPI1_NSS, USART3_CK, QUADSPI_BK1_IO1 and LCD_SEG5 alternate functions, and ADC1_IN15 as an additional function. |
| 19 | PB1 | bidirectional | 5 V tolerant I/O (FT_la) with TIM1_CH3N, USART3_RTS_DE, LPUART1_RTS_DE, QUADSPI_BK1_IO0, LCD_SEG6 and LPTIM2_IN1 alternate functions, and ADC1_IN16 and COMP1_INM as additional functions. |
| 20 | PB2 | bidirectional | 5 V tolerant analog-capable I/O (FT_a) with RTC_OUT, LPTIM1_OUT, I2C3_SMBA, LCD_VLCD and EVENTOUT alternate functions, and COMP1_INP as an additional function. |
| 21 | PB10 | bidirectional | 5 V tolerant I/O (FT_fl) with TIM2_CH3, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX, TSC_SYNC, QUADSPI_CLK, LCD_SEG10, COMP1_OUT and SAI1_SCK_A alternate functions. |
| 22 | PB11 | bidirectional | 5 V tolerant I/O (FT_fl) with TIM2_CH4, I2C2_SDA, USART3_RX, LPUART1_TX, QUADSPI_BK1_NCS, LCD_SEG11 and COMP2_OUT alternate functions. |
| 23 | VSS | power_in | Ground pin for the digital supply domain. |
| 24 | VDD | power_in | Digital supply, 1.71 V to 3.6 V standard operating voltage. |
| 25 | PB12 | bidirectional | 5 V tolerant I/O (FT_l) with TIM1_BKIN, TIM1_BKIN_COMP2, I2C2_SMBA, SPI2_NSS, USART3_CK, LPUART1_RTS_DE, TSC_G1_IO1, LCD_SEG12, SWPMI1_IO, SAI1_FS_A and TIM15_BKIN alternate functions. |
| 26 | PB13 | bidirectional | 5 V tolerant I/O (FT_fl) with TIM1_CH1N, I2C2_SCL, SPI2_SCK, USART3_CTS, LPUART1_CTS, TSC_G1_IO2, LCD_SEG13, SWPMI1_TX, SAI1_SCK_A and TIM15_CH1N alternate functions. |
| 27 | PB14 | bidirectional | 5 V tolerant I/O (FT_fl) with TIM1_CH2N, I2C2_SDA, SPI2_MISO, USART3_RTS_DE, TSC_G1_IO3, LCD_SEG14, SWPMI1_RX, SAI1_MCLK_A and TIM15_CH1 alternate functions. |
| 28 | PB15 | bidirectional | 5 V tolerant I/O (FT_l) with RTC_REFIN, TIM1_CH3N, SPI2_MOSI, TSC_G1_IO4, LCD_SEG15, SWPMI1_SUSPEND, SAI1_SD_A and TIM15_CH2 alternate functions. |
| 29 | PA8 | bidirectional | 5 V tolerant I/O (FT_l) with MCO, TIM1_CH1, USART1_CK, LCD_COM0, SWPMI1_IO, SAI1_SCK_A, LPTIM2_OUT and EVENTOUT alternate functions. |
| 30 | PA9 | bidirectional | 5 V tolerant I/O (FT_fl) with TIM1_CH2, I2C1_SCL, USART1_TX, LCD_COM1, SAI1_FS_A and TIM15_BKIN alternate functions. |
| 31 | PA10 | bidirectional | 5 V tolerant I/O (FT_fl) with TIM1_CH3, I2C1_SDA, USART1_RX, USB_CRS_SYNC, LCD_COM2 and SAI1_SD_A alternate functions. |
| 32 | PA11 | bidirectional | 5 V tolerant USB-capable I/O (FT_u, USB function supplied by VDDUSB) with TIM1_CH4, TIM1_BKIN2, SPI1_MISO, USART1_CTS, CAN1_RX, USB_DM and TIM1_BKIN2_COMP1 alternate functions, and COMP1_OUT as an additional function. |
| 33 | PA12 | bidirectional | 5 V tolerant USB-capable I/O (FT_u, USB function supplied by VDDUSB) with TIM1_ETR, SPI1_MOSI, USART1_RTS_DE, CAN1_TX and USB_DP alternate functions. |
| 34 | PA13 (JTMS-SWDIO) | bidirectional | 5 V tolerant I/O (FT) that after reset is the JTMS-SWDIO debug function with an internal pull-up enabled, also with IR_OUT, USB_NOE, SWPMI1_TX, SAI1_SD_B and EVENTOUT alternate functions. |
| 35 | VSS | power_in | Ground pin for the digital supply domain. |
| 36 | VDDUSB | power_in | USB supply, 3.0 V to 3.6 V when USB is used (0 to 3.6 V when USB is not used). |
| 37 | PA14 (JTCK-SWCLK) | bidirectional | 5 V tolerant I/O (FT) that after reset is the JTCK-SWCLK debug function with an internal pull-down enabled, also with LPTIM1_OUT, I2C1_SMBA, SWPMI1_RX, SAI1_FS_B and EVENTOUT alternate functions. |
| 38 | PA15 (JTDI) | bidirectional | 5 V tolerant I/O (FT_l) that after reset is the JTDI debug function with an internal pull-up enabled, also with TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS, SPI3_NSS, USART3_RTS_DE, TSC_G3_IO1, LCD_SEG17 and SWPMI1_SUSPEND alternate functions. |
| 39 | PB3 (JTDO-TRACESWO) | bidirectional | 5 V tolerant analog-capable I/O (FT_la) that after reset is the JTDO-TRACESWO debug function, also with TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_RTS_DE, LCD_SEG7, SAI1_SCK_B and EVENTOUT alternate functions, and COMP2_INM as an additional function. |
| 40 | PB4 (NJTRST) | bidirectional | 5 V tolerant I/O (FT_fla) that after reset is the NJTRST debug function with an internal pull-up enabled, also with I2C3_SDA, SPI1_MISO, SPI3_MISO, USART1_CTS, TSC_G2_IO1, LCD_SEG8, SAI1_MCLK_B and EVENTOUT alternate functions, and COMP2_INP as an additional function. |
| 41 | PB5 | bidirectional | 5 V tolerant I/O (FT_l) with LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, TSC_G2_IO2, LCD_SEG9, COMP2_OUT, SAI1_SD_B and TIM16_BKIN alternate functions. |
| 42 | PB6 | bidirectional | 5 V tolerant analog-capable I/O (FT_fa) with LPTIM1_ETR, I2C1_SCL, USART1_TX, TSC_G2_IO3, SAI1_FS_B and TIM16_CH1N alternate functions, and COMP2_INP as an additional function. |
| 43 | PB7 | bidirectional | 5 V tolerant analog-capable I/O (FT_fla) with LPTIM1_IN2, I2C1_SDA, USART1_RX, TSC_G2_IO4 and LCD_SEG21 alternate functions, and COMP2_INM and PVD_IN as additional functions. |
| 44 | PH3/BOOT0 | bidirectional | 5 V tolerant I/O (FT) that is also the BOOT0 boot-mode pin, with EVENTOUT as its alternate function. |
| 45 | PB8 | bidirectional | 5 V tolerant I/O (FT_fl) with I2C1_SCL, CAN1_RX, LCD_SEG16, SDMMC1_D4, SAI1_MCLK_A and TIM16_CH1 alternate functions. |
| 46 | PB9 | bidirectional | 5 V tolerant I/O (FT_fl) with IR_OUT, I2C1_SDA, SPI2_NSS, CAN1_TX, LCD_COM3, SDMMC1_D5 and SAI1_FS_A alternate functions. |
| 47 | VSS | power_in | Ground pin for the digital supply domain. |
| 48 | VDD | power_in | Digital supply, 1.71 V to 3.6 V standard operating voltage. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
CAD (KiCad official)
- Symbol:
STM32L433CBT6 - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32l433cbt6-etched.step/stm32l433cbt6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l433cbt6.step/stm32l433cbt6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (205 pp, sha256
b352990bb6ff2486, retrieved 2026-10-10, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).