ADA4177-4ARZ-R7 from Analog Devices, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	OUT A	output	Output Channel A.
2	-IN A	input	Inverting Input Channel A.
3	+IN A	input	Noninverting Input Channel A.
4	V+	power_in	Positive Supply Voltage.
5	+IN B	input	Noninverting Input Channel B.
6	-IN B	input	Inverting Input Channel B.
7	OUT B	output	Output Channel B.
8	OUT C	output	Output Channel C.
9	-IN C	input	Inverting Input Channel C.
10	+IN C	input	Noninverting Input Channel C.
11	V-	power_in	Negative Supply Voltage.
12	+IN D	input	Noninverting Input Channel D.
13	-IN D	input	Inverting Input Channel D.
14	OUT D	output	Output Channel D.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	SOIC-14
Category	Operational Amplifier/Comparator
Pins	14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input Offset Voltage, 14-Lead SOIC, VSY ±5 V	VOS		2	60	µV		4
Input Offset Voltage, 14-Lead SOIC, VSY ±5 V, over temperature	VOS			120	µV	−40°C < TA < +125°C	4
Offset Voltage Drift, 14-Lead SOIC, VSY ±5 V	ΔVOS/ΔT			1	µV/°C	−40°C < TA < +125°C	4
Input Bias Current, VSY ±5 V	IB	-1	-0.4	1	nA		4
Input Bias Current, VSY ±5 V, over temperature	IB	-2		2	nA	−40°C < TA < +125°C	4
Input Offset Current, VSY ±5 V	IOS	-0.75	0.1	0.75	nA		4
Input Offset Current, VSY ±5 V, over temperature	IOS	-1.5		1.5	nA	−40°C < TA < +125°C	4
Input Voltage Range, VSY ±5 V	IVR	-3.5		3.5	V		4
Common-Mode Rejection Ratio, VSY ±5 V	CMRR	122	130		dB	VCM = −3.5 V to +3.5 V	4
Common-Mode Rejection Ratio, VSY ±5 V, over temperature	CMRR	120			dB	−40°C < TA < +125°C	4
Large Signal Voltage Gain, RL = 2 kΩ, VSY ±5 V	AVO	108	110		dB	RL = 2 kΩ, VOUT = −4.5 V to +4.5 V	4
Large Signal Voltage Gain, RL = 2 kΩ, VSY ±5 V, over temperature	AVO	100			dB	−40°C < TA < +125°C	4
Large Signal Voltage Gain, RL = 10 kΩ, VSY ±5 V	AVO	115	120		dB	RL = 10 kΩ, VOUT = −4.5 V to +4.5 V	4
Large Signal Voltage Gain, RL = 10 kΩ, VSY ±5 V, over temperature	AVO	110			dB	−40°C < TA < +125°C	4
Output Voltage High, VSY ±5 V	VOH	4.95			V	ILOAD = 1 mA	4
Output Voltage High, VSY ±5 V, over temperature	VOH	4.9			V	−40°C < TA < +125°C	4
Output Voltage High, VSY ±5 V, 7 mA load	VOH	4.8			V	ILOAD = 7 mA	4
Output Voltage High, VSY ±5 V, 7 mA load, over temperature	VOH	4.75			V	−40°C < TA < +125°C	4
Output Voltage Low, VSY ±5 V	VOL			-4.95	V	ILOAD = 1 mA	4
Output Voltage Low, VSY ±5 V, over temperature	VOL			-4.9	V	−40°C < TA < +125°C	4
Output Voltage Low, VSY ±5 V, 7 mA load	VOL			-4.8	V	ILOAD = 7 mA	4
Output Voltage Low, VSY ±5 V, 7 mA load, over temperature	VOL			-4.75	V	−40°C < TA < +125°C	4
Output Current, VSY ±5 V	IOUT	25			mA	VDROPOUT < 1 V	4
Power Supply Rejection Ratio, VSY ±5 V	PSRR	125	145		dB	VS = ±2.5 V to ±18 V	5
Power Supply Rejection Ratio, VSY ±5 V, over temperature	PSRR	120			dB	−40°C < TA < +125°C	5
Supply Current per Amplifier, VSY ±5 V	ISY		500	560	µA	VOUT = 0 V	5
Supply Current per Amplifier, VSY ±5 V, over temperature	ISY			600	µA	−40°C < TA < +125°C	5
Input Offset Voltage, 14-Lead SOIC, VSY ±15 V	VOS		2	60	µV		6
Input Offset Voltage, 14-Lead SOIC, VSY ±15 V, over temperature	VOS			120	µV	−40°C < TA < +125°C	6
Offset Voltage Drift, 14-Lead SOIC, VSY ±15 V	ΔVOS/ΔT			1	µV/°C	−40°C < TA < +125°C	6
Input Bias Current, VSY ±15 V	IB	-1	-0.3	1	nA		6
Input Bias Current, VSY ±15 V, over temperature	IB	-2		2	nA	−40°C < TA < +125°C	6
Input Offset Current, VSY ±15 V	IOS	-0.75	0.1	0.75	nA		6
Input Offset Current, VSY ±15 V, over temperature	IOS	-1.5		1.5	nA	−40°C < TA < +125°C	6
Input Voltage Range, VSY ±15 V	IVR	-13.5		13.5	V		6
Common-Mode Rejection Ratio, VSY ±15 V	CMRR	128	130		dB	VCM = −13.5 V to +13.5 V	6
Common-Mode Rejection Ratio, VSY ±15 V, over temperature	CMRR	125			dB	−40°C < TA < +125°C	6
Large Signal Voltage Gain, RL = 2 kΩ, VSY ±15 V	AVO	110	114		dB	RL = 2 kΩ, VOUT = −14.2 V to +14.2 V	6
Large Signal Voltage Gain, RL = 2 kΩ, VSY ±15 V, over temperature	AVO	103			dB	−40°C < TA < +125°C	6
Large Signal Voltage Gain, RL = 10 kΩ, VSY ±15 V	AVO	118	120		dB	RL = 10 kΩ, VOUT = −14.5 V to +14.5 V	6
Large Signal Voltage Gain, RL = 10 kΩ, VSY ±15 V, over temperature	AVO	110			dB	−40°C < TA < +125°C	6
Output Voltage High, VSY ±15 V	VOH	14.95			V	ILOAD = 1 mA	6
Output Voltage High, VSY ±15 V, over temperature	VOH	14.9			V	−40°C < TA < +125°C	6
Output Voltage High, VSY ±15 V, 7 mA load	VOH	14.8			V	ILOAD = 7 mA	6
Output Voltage High, VSY ±15 V, 7 mA load, over temperature	VOH	14.75			V	−40°C < TA < +125°C	6
Output Voltage Low, VSY ±15 V	VOL			-14.95	V	ILOAD = 1 mA	6
Output Voltage Low, VSY ±15 V, over temperature	VOL			-14.9	V	−40°C < TA < +125°C	6
Output Voltage Low, VSY ±15 V, 7 mA load	VOL			-14.8	V	ILOAD = 7 mA	6
Output Voltage Low, VSY ±15 V, 7 mA load, over temperature	VOL			-14.75	V	−40°C < TA < +125°C	6
Output Current, VSY ±15 V	IOUT	25			mA	VDROPOUT < 1 V	6
Power Supply Rejection Ratio, VSY ±15 V	PSRR	125	145		dB	VS = ±2.5 V to ±18 V	7
Power Supply Rejection Ratio, VSY ±15 V, over temperature	PSRR	120			dB	−40°C < TA < +125°C	7
Supply Current per Amplifier, VSY ±15 V	ISY		500	580	µA	VOUT = 0 V	7
Supply Current per Amplifier, VSY ±15 V, over temperature	ISY			620	µA	−40°C < TA < +125°C	7
Supply Voltage				36	V		8
Storage Temperature Range		-65		150	°C		8
Operating Temperature Range		-40		125	°C		8
Thermal Resistance, junction to ambient, 14-Lead SOIC	θJA			115	°C/W	Worst case, device soldered in circuit board	8

CAD (KiCad official)

Symbol: ADA4177-4ARZ-R7
Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
3D model: SOIC-14 (KiCad packages3D, STEP)
3D model files: ada4177-4arz-r7-etched.step / ada4177-4arz-r7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ada4177-4arz-r7.step / ada4177-4arz-r7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (33 pp, sha256 363c6bb4b4db88f1, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

ADA4177-4ARZ-R7

Verified ADA4177-4ARZ-R7

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README