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TPS76833QPWP
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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, HTSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS76833QPWP
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HTSSOP-20
TPS76833QPWP from Texas Instruments, in a HTSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND/HSINK | power_in | Regulator ground and heatsink terminal. |
| 2 | GND/HSINK | power_in | Regulator ground and heatsink terminal. |
| 3 | GND | power_in | Regulator ground. |
| 4 | NC | unconnected | No connect; not internally connected. |
| 5 | EN | input | Enable input; applying a TTL high signal shuts down the regulator and reduces quiescent current to less than 1 µA at TJ = 25°C. |
| 6 | IN | power_in | Input voltage; specified input range is 2.7 V to 10 V. |
| 7 | IN | power_in | Input voltage; specified input range is 2.7 V to 10 V. |
| 8 | NC | unconnected | No connect; not internally connected. |
| 9 | GND/HSINK | power_in | Regulator ground and heatsink terminal. |
| 10 | GND/HSINK | power_in | Regulator ground and heatsink terminal. |
| 11 | GND/HSINK | power_in | Regulator ground and heatsink terminal. |
| 12 | GND/HSINK | power_in | Regulator ground and heatsink terminal. |
| 13 | OUT | power_out | Regulated output voltage; the output requires a minimum 10 µF capacitor with ESR between 60 mΩ and 1.5 Ω. |
| 14 | OUT | power_out | Regulated output voltage; the output requires a minimum 10 µF capacitor with ESR between 60 mΩ and 1.5 Ω. |
| 15 | FB/NC | input | Feedback input voltage for the adjustable device; no connect for fixed-output options. |
| 16 | PG | output | Open-drain power-good output that goes low when the output falls to between 92% and 98% of nominal and requires a pullup resistor. |
| 17 | NC | unconnected | No connect; not internally connected. |
| 18 | NC | unconnected | No connect; not internally connected. |
| 19 | GND/HSINK | power_in | Regulator ground and heatsink terminal. |
| 20 | GND/HSINK | power_in | Regulator ground and heatsink terminal. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-20 |
| Category | Power Management (PMIC) |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage tolerance | VOUT | -2 | 2 | % | -40°C ≤ TJ ≤ +125°C, VO + 1 V ≤ VIN ≤ 10 V, 10 µA ≤ IO ≤ 1 A | 3 | |
| Output current limit | 1.2 | 1.7 | 2 | A | VO = 0 V | 3 | |
| Dropout voltage | 350 | mV | IO = 1 A, TJ = +25°C | 3 | |||
| Dropout voltage | 575 | mV | IO = 1 A, TJ = -40°C to +125°C | 3 | |||
| PG trip threshold voltage | 92 | 98 | %VO | VO decreasing | 3 | ||
| PG output low voltage | 0.15 | 0.4 | V | VI = 2.7 V, IO(PG) = 1 mA | 3 | ||
| Quiescent current (GND current) | 85 | µA | 10 µA < IO < 1 A, TJ = +25°C, EN = 0 V | 3 | |||
| Quiescent current (GND current) | 125 | µA | IO = 1 A, TJ = -40°C to +125°C, EN = 0 V | 3 | |||
| High-level enable input voltage | 1.7 | V | 3 | ||||
| Low-level enable input voltage | 0.9 | V | 3 | ||||
| Minimum input voltage for valid PG | 1.1 | V | IO(PG) = 300 µA | 3 | |||
| PG leakage current | 1 | µA | V(PG) = 5 V | 3 | |||
| Standby current | 1 | µA | VEN = VI, TJ = +25°C, 2.7 V < VI < 10 V | 3 | |||
| Standby current | 10 | µA | VEN = VI, TJ = -40°C to +125°C, 2.7 V < VI < 10 V | 3 | |||
| Load regulation | 3 | mV | 3 | ||||
| Output voltage line regulation | ΔVO/VO | 0.01 | %/V | VO + 1 V < VI ≤ 10 V, TJ = +25°C | 3 | ||
| Power-supply ripple rejection | 60 | dB | f = 1 kHz, CO = 10 µF, TJ = +25°C | 3 | |||
| Thermal shutdown junction temperature | 150 | °C | 3 | ||||
| PG hysteresis voltage | 0.5 | %VO | Measured at VO | 3 | |||
| Input voltage range | VI | -0.3 | 13.5 | V | 2 | ||
| Voltage range at EN | -0.3 | V | Upper limit VI + 0.3 V | 2 | |||
| Maximum PG voltage | 16.5 | V | 2 | ||||
| Output voltage | VO | 7 | V | OUT, FB | 2 | ||
| Operating junction temperature range | TJ | -40 | 125 | °C | 2 | ||
| Storage temperature range | Tstg | -65 | 150 | °C | 2 | ||
| ESD rating, HBM | 2 | kV | HBM | 2 | |||
| Input voltage range | VI | 2.7 | 10 | V | Minimum VIN = VOUT + VDO or 2.7 V, whichever is greater | 2 | |
| Output current | IO | 0 | 1 | A | 2 | ||
| Operating junction temperature | TJ | -40 | 125 | °C | 2 | ||
| Junction-to-ambient thermal resistance | RθJA | 32.6 | °C/W | 20-pin TSSOP (PWP), no airflow | 13 | ||
| Power dissipation derating factor | 30.7 | mW/°C | PWP, 0 CFM air flow, above TA = +25°C | 2 |
CAD (KiCad official)
- Symbol:
TPS76833QPWP - Footprint:
Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm - 3D model: HTSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
tps76833qpwp-etched.step/tps76833qpwp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps76833qpwp.step/tps76833qpwp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
742896d0a1cf7766, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).