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LM5025AMTCX

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by Ray

Texas Instruments DC-DC Converters, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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LM5025AMTCX

Texas Instruments · DC-DC Converters · TSSOP-16

LM5025AMTCX from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Source input voltage to the internal high-voltage start-up regulator. Operating range 13 V to 90 V, with transient capability to 105 V.
2 RAMP input Modulator ramp input. An external RC circuit from VIN sets the ramp slope; the pin is discharged each cycle by an internal FET triggered by the clock or the Volt-Second clamp comparator.
3 CS1 input Current sense input for cycle-by-cycle current limiting. Outputs enter cycle-by-cycle limit if CS1 exceeds 0.5 V; held low for 50 ns after OUT_A rises (leading-edge blanking).
4 CS2 input Current sense input for soft restart / cycle skip. If CS2 exceeds 0.5 V the outputs are disabled and a soft-start sequence is initiated; SS is fully discharged then released with a 1-µA pull-up.
5 TIME input Output overlap and dead-time control. An RSET resistor from TIME to GND produces in-phase OUT_A/OUT_B with overlap; RSET from TIME to REF produces out-of-phase OUT_A/OUT_B with dead time.
6 REF power_out Precision 5-V reference output. Sourcing up to 10 mA; decouple locally with a 0.1-µF capacitor. Remains low until VCC UV comparator is satisfied.
7 VCC power_in Output of the internal high-voltage start-up regulator, nominally regulated to 7.6 V. Also the bias supply input for the IC; an auxiliary winding raising VCC above the regulation setpoint shuts down the internal start-up regulator to reduce dissipation.
8 OUT_A output Main switch PWM gate-driver output. 3-A peak sink capability.
9 OUT_B output Active clamp switch gate-driver output. 1.25-A peak sink capability.
10 PGND power_in Power ground return for the gate drivers. Connect directly to AGND at a single point.
11 AGND power_in Analog ground for the control circuitry. Connect directly to PGND; on the WSON package the exposed pad is electrically connected to AGND.
12 SS input Soft-start control. An external capacitor with the internal 20-µA source sets the soft-start ramp; source drops to 1 µA after CS2 overcurrent or over-temperature events.
13 COMP input PWM comparator input. Includes an internal 5-kΩ pull-up; an external opto-coupler sinks current from COMP to control the PWM duty cycle.
14 RT input Oscillator timing resistor pin. An external resistor from RT to GND sets the internal oscillator frequency (up to 1 MHz).
15 SYNC input Oscillator UP/DOWN synchronization input. Accepts an external clock whose frequency is up to 20% lower than or higher than the internal free-running frequency; no maximum sync-frequency constraint.
16 UVLO input Line undervoltage shutdown input. External divider sets the shutdown threshold (comparator trip 2.5 V); hysteresis provided by a 20-µA internal current source switched at the 2.5-V threshold.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category PMIC
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • LM5025AMTCX
  • LM5025AMTCXSQ
  • LM5025AMTCXSQE
  • LM5025AMTCXSQX

CAD (KiCad official)

  • Symbol: LM5025AMTCX
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (34 pp, sha256 970dbd727e87b319, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF