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INA180B2IDBVR

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Texas Instruments Current-Sensing Amplifiers, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentop-amp-cmpina180b2idbvr
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Datasheet

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Contents

README

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INA180B2IDBVR

Texas Instruments · Current-Sensing Amplifiers · SOT-23-5

INA180B2IDBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN+ input Non-inverting analog input to the current-sense amplifier. For high-side sensing, connect to the bus (power-supply) side of the sense resistor; for low-side sensing, connect to the load side of the sense resistor.
2 GND power_in Analog ground reference for the amplifier.
3 IN- input Inverting analog input to the current-sense amplifier. For high-side sensing, connect to the load side of the sense resistor; for low-side sensing, connect to the ground side of the sense resistor.
4 OUT output Analog output voltage. Output = Gain (50 V/V for B2) x (V(IN+) - V(IN-)). Swings from ~(V_GND + 5 mV) up to ~(V_S - 30 mV) with a 10 kΩ load to GND.
5 VS power_in Positive supply input. Operating range 2.7 V to 5.5 V; typical quiescent current ~260 µA (max) for INA180. Bypass with a 0.1 µF capacitor to GND close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Op-amp/Cmp
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • INA180B2IDBVR
  • INA180B2IDBVT
  • INA180B2IDBVRIDGKR
  • INA180B2IDBVRIDGKT
  • INA180B2IDBVRIDSGR
  • INA180B2IDBVRIPWR

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage (RTI), VIN+ = 0V VOS -150 25 150 μV VIN+ = 0V 8
Input offset voltage (RTI) VOS -500 100 500 μV 8
Offset voltage drift (RTI) dVOS/dT 0.2 1 μV/°C TA = -40°C 至 +125°C 8
Common-mode rejection ratio (RTI) CMRR 84 100 dB VIN+ = 0V 至 26V, VSENSE = 10mV, TA = –40°C 至 +125°C 8
Power-supply rejection ratio (RTI) PSRR -40 8 40 μV/V VS = 2.7 V 至 5.5 V, VSENSE = 10 mV 8
Input offset current IIO -0.05 0.05 μA VSENSE = 0mV 8
Gain error EG -1 0.1 1 % VOUT = 0.5V 至 VS – 0.5V, TA = –40°C 至 +125°C 8
Gain error vs temperature 1.5 20 ppm/°C TA = -40°C 至 +125°C 8
Nonlinearity error -0.01 0.01 % VOUT = 0.5V 至 VS – 0.5V 8
Maximum capacitive load 1 nF 无持续振荡 8
Quiescent current (INA180) IQ 197 260 μA VSENSE = 10 mV 8
Quiescent current (INA180) over temperature IQ 300 μA VSENSE = 10mV，TA = –40°C 至 +125°C 8
Supply voltage (absolute maximum) VS 6 V 7
Differential input voltage (absolute maximum) (VIN+)-(VIN-) -26 26 V 7
Common-mode input voltage, IN+ and IN- (absolute maximum) 26 V 7
Maximum output current IOUT 8 mA 7
Operating temperature range, natural ventilation (absolute maximum) TA -55 150 °C 自然通风工作温度范围 7
Junction temperature (absolute maximum) TJ 150 °C 7
Storage temperature (absolute maximum) Tstg -65 150 °C 7
ESD, human body model (HBM) V(ESD) -3000 3000 V ANSI/ESDA/JEDEC JS-001 7
ESD, charged device model (CDM) V(ESD) -1000 1000 V JEDEC JESD22-C101 7
Common-mode input voltage (IN+ and IN–), recommended VCM -0.2 12 26 V 7
Operating supply voltage, recommended VS 2.7 5 5.5 V 7
Operating ambient temperature, recommended TA -40 125 °C 自然通风 7
Junction-to-ambient thermal resistance (DBV SOT-23) RθJA 197.1 °C/W DBV (SOT23) package 7
Junction-to-case (top) thermal resistance (DBV SOT-23) RθJC(top) 95.8 °C/W DBV (SOT23) package 7
Junction-to-board thermal resistance (DBV SOT-23) RθJB 53.1 °C/W DBV (SOT23) package 7
Junction-to-top characterization parameter (DBV SOT-23) ψJT 23.4 °C/W DBV (SOT23) package 7
Junction-to-board characterization parameter (DBV SOT-23) ψJB 52.7 °C/W DBV (SOT23) package 7

CAD (KiCad official)

  • Symbol: INA180B2IDBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: ina180b2idbvr-etched.step / ina180b2idbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ina180b2idbvr.step / ina180b2idbvr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ina180b2idbvr.step 85 KB You want the bare part, or you mark your own boards.
ina180b2idbvr-etched.step 2.3 MB You want the part with INA180B2IDBVR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 577 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (50 pp, sha256 271a5242291d4eca, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF