component
74LV132AS14-13
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Diodes Incorporated Logic Gates, SO-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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PCB Footprint
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Datasheet
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README
markdown74LV132AS14-13
Diodes Incorporated · Logic Gates · SO-14
74LV132AS14-13 from Diodes Incorporated, in a SO-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input of NAND gate 1; it is a Schmitt-trigger input tolerant to 5.5V, so it can be driven from 3.3V or 5V logic. |
| 2 | 1B | input | Data input of NAND gate 1; it is a Schmitt-trigger input tolerant to 5.5V, so it can be driven from 3.3V or 5V logic. |
| 3 | 1Y | output | Push-pull NAND output of gate 1, Y = NOT(A AND B), with the output disabled under IOFF when the device is powered down. |
| 4 | 2A | input | Data input of NAND gate 2; it is a Schmitt-trigger input tolerant to 5.5V, so it can be driven from 3.3V or 5V logic. |
| 5 | 2B | input | Data input of NAND gate 2; it is a Schmitt-trigger input tolerant to 5.5V, so it can be driven from 3.3V or 5V logic. |
| 6 | 2Y | output | Push-pull NAND output of gate 2, Y = NOT(A AND B), with the output disabled under IOFF when the device is powered down. |
| 7 | GND | power_in | Ground reference pin for the device. |
| 8 | 3Y | output | Push-pull NAND output of gate 3, Y = NOT(A AND B), with the output disabled under IOFF when the device is powered down. |
| 9 | 3A | input | Data input of NAND gate 3; it is a Schmitt-trigger input tolerant to 5.5V, so it can be driven from 3.3V or 5V logic. |
| 10 | 3B | input | Data input of NAND gate 3; it is a Schmitt-trigger input tolerant to 5.5V, so it can be driven from 3.3V or 5V logic. |
| 11 | 4Y | output | Push-pull NAND output of gate 4, Y = NOT(A AND B), with the output disabled under IOFF when the device is powered down. |
| 12 | 4A | input | Data input of NAND gate 4; it is a Schmitt-trigger input tolerant to 5.5V, so it can be driven from 3.3V or 5V logic. |
| 13 | 4B | input | Data input of NAND gate 4; it is a Schmitt-trigger input tolerant to 5.5V, so it can be driven from 3.3V or 5V logic. |
| 14 | VCC | power_in | Supply voltage pin; the device is designed for a supply range of 2.0V to 5.5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SO-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 2 | 5.5 | V | 3 | ||
| Input Voltage | VI | 0 | 5.5 | V | 3 | ||
| Output Voltage | VO | 0 | V | 3 | |||
| High-Level Output Current | IOH | -50 | mA | VCC = 2.0V | 3 | ||
| High-Level Output Current | IOH | -2 | μA | VCC = 2.3V to 2.7V | 3 | ||
| High-Level Output Current | IOH | -6 | mA | VCC = 3.0V to 3.6V | 3 | ||
| High-Level Output Current | IOH | -12 | mA | VCC = 4.5V to 5.5V | 3 | ||
| Low-Level Output Current | IOL | 50 | μA | VCC = 2.0V | 3 | ||
| Low-Level Output Current | IOL | 2 | mA | VCC = 2.3V to 2.7V | 3 | ||
| Low-Level Output Current | IOL | 6 | mA | VCC = 3.0V to 3.6V | 3 | ||
| Low-Level Output Current | IOL | 12 | mA | VCC = 4.5V to 5.5V | 3 | ||
| Operating Free-Air Temperature | TA | -40 | 125 | °C | 3 | ||
| Supply Voltage Range | VCC | -0.5 | 7 | V | 2 | ||
| Input Voltage Range | VI | -0.5 | 7 | V | 2 | ||
| Input Clamp Current | IIK | -20 | mA | VI < 0V | 2 | ||
| Output Clamp Current | IOK | -50 | mA | VO < -0V | 2 | ||
| Continuous Output Current | IO | -25 | 25 | mA | -0.5V < VO VCC + 0.5V | 2 | |
| Continuous Current Through Vcc | ICC | 50 | mA | 2 | |||
| Continuous Current Through GND | IGND | -50 | mA | 2 | |||
| Operating Junction Temperature | TJ | -40 | 150 | °C | 2 | ||
| Storage Temperature | TSTG | -65 | 150 | °C | 2 | ||
| Total Power Dissipation | PTOT | 500 | mW | 2 | |||
| ESD Protection Human Body Model | ESD HBM | 2 | kV | Human Body Model | 2 | ||
| ESD Protection Charged Device Model | ESD CDM | 1 | kV | Charged Device Model | 2 | ||
| ESD Protection Machine Model | ESD MM | 200 | V | Machine Model | 2 | ||
| Positive Going Threshold | VT+ | 1 | 1.75 | V | VCC = 2.5V, TA = -40 to +125°C | 3 | |
| Positive Going Threshold | VT+ | 1.31 | 2.31 | V | VCC = 3.3V, TA = -40 to +125°C | 3 | |
| Positive Going Threshold | VT+ | 1.95 | 3.5 | V | VCC = 5.0V, TA = -40 to +125°C | 3 | |
| Negative Going Threshold | VT- | 0.75 | 1.5 | V | VCC = 2.5V, TA = -40 to +125°C | 3 | |
| Negative Going Threshold | VT- | 0.99 | 2.07 | V | VCC = 3.3V, TA = -40 to +125°C | 3 | |
| Negative Going Threshold | VT- | 1.5 | 3.05 | V | VCC = 5.0V, TA = -40 to +125°C | 3 | |
| Hysteresis (VT+ - VT-) | VH | 0.25 | 1 | V | VCC = 2.5V, TA = -40 to +125°C | 3 | |
| Hysteresis (VT+ - VT-) | VH | 0.33 | 1.32 | V | VCC = 3.3V, TA = -40 to +125°C | 3 | |
| Hysteresis (VT+ - VT-) | VH | 0.5 | 2 | V | VCC = 5.0V, TA = -40 to +125°C | 3 | |
| High-Level Output Voltage | VOH | 2 | V | IOH = -2mA, VCC = 2.3V, TA = -40 to +125°C | 3 | ||
| High-Level Output Voltage | VOH | 2.48 | V | IOH = -6mA, VCC = 3.0V, TA = -40 to +125°C | 3 | ||
| High-Level Output Voltage | VOH | 3.8 | V | IOH = -12mA, VCC = 4.5V, TA = -40 to +125°C | 3 | ||
| Low-Level Output Voltage | VOL | 0.1 | V | IOL = 50μA, VCC = 2.0V to 5.5V, TA = -40 to +125°C | 3 | ||
| Low-Level Output Voltage | VOL | 0.4 | V | IOL = 2mA, VCC = 2.3V, TA = -40 to +125°C | 3 | ||
| Low-Level Output Voltage | VOL | 0.44 | V | IOL = 6mA, VCC = 3.0V, TA = -40 to +125°C | 3 | ||
| Low-Level Output Voltage | VOL | 0.55 | V | IOL = 12mA, VCC = 4.5V, TA = -40 to +125°C | 3 | ||
| Power Down Leakage Current | IOFF | 5 | μA | VI or VO = 0 to 5.5V, VCC = 0V, TA = -40 to +125°C | 3 | ||
| Input Current | II | -1 | 1 | μA | VI = GND or 5.5V, VCC = 0 to 5.5V, TA = -40 to +125°C | 3 | |
| Supply Current | ICC | 20 | μA | VI = GND or VCC, IO = 0, VCC = 5.5V, TA = -40 to +125°C | 3 | ||
| Propagation Delay AN to YN | tPD | 1 | 18.5 | ns | Figure 1, CL = 15pF, VCC = 2.5V ± 0.2V, TA = -40 to +125°C | 4 | |
| Propagation Delay AN to YN | tPD | 1 | 14 | ns | Figure 1, CL = 15pF, VCC = 3.3V ± 0.3V, TA = -40 to +125°C | 4 | |
| Propagation Delay AN to YN | tPD | 1 | 9 | ns | Figure 1, CL = 15pF, VCC = 5.0V ± 0.5V, TA = -40 to +125°C | 4 | |
| Propagation Delay AN to YN | tPD | 1 | 23 | ns | Figure 1, CL = 50pF, VCC = 2.5V ± 0.2V, TA = -40 to +125°C | 4 | |
| Propagation Delay AN to YN | tPD | 1 | 17.5 | ns | Figure 1, CL = 50pF, VCC = 3.3V ± 0.3V, TA = -40 to +125°C | 4 | |
| Propagation Delay AN to YN | tPD | 1 | 11 | ns | Figure 1, CL = 50pF, VCC = 5.0V ± 0.5V, TA = -40 to +125°C | 4 | |
| Propagation Delay AN to YN (25°C) | tPD | 7.9 | 16.5 | ns | Figure 1, CL = 15pF, VCC = 2.5V ± 0.2V, TA = +25°C | 4 | |
| Propagation Delay AN to YN (25°C) | tPD | 5.6 | 11.9 | ns | Figure 1, CL = 15pF, VCC = 3.3V ± 0.3V, TA = +25°C | 4 | |
| Propagation Delay AN to YN (25°C) | tPD | 3.9 | 7.7 | ns | Figure 1, CL = 15pF, VCC = 5.0V ± 0.5V, TA = +25°C | 4 | |
| Propagation Delay AN to YN (25°C) | tPD | 10.8 | 20.2 | ns | Figure 1, CL = 50pF, VCC = 2.5V ± 0.2V, TA = +25°C | 4 | |
| Propagation Delay AN to YN (25°C) | tPD | 7.6 | 15.4 | ns | Figure 1, CL = 50pF, VCC = 3.3V ± 0.3V, TA = +25°C | 4 | |
| Propagation Delay AN to YN (25°C) | tPD | 5.3 | 9.7 | ns | Figure 1, CL = 50pF, VCC = 5.0V ± 0.5V, TA = +25°C | 4 | |
| Quiet output, maximum dynamic VOL | VOL(p) | 0.2 | 0.8 | V | VCC = 3V, CL = 50pF, TA = +25°C | 4 | |
| Quiet output, minimum dynamic VOL | VOL(V) | -0.1 | -0.8 | V | VCC = 3V, CL = 50pF, TA = +25°C | 4 | |
| High Level dynamic input voltage | VIH(D) | 2.31 | V | VCC = 3V, CL = 50pF, TA = +25°C | 4 | ||
| Low Level dynamic input voltage | VIL(D) | 0.99 | V | VCC = 3V, CL = 50pF, TA = +25°C | 4 |
CAD (KiCad official)
- Symbol:
74LV132AS14-13 - Footprint:
Adom_Gen:Diodes_Incorporated_74 - 3D model: SO-14 (KiCad packages3D, STEP)
- 3D model files:
74lv132as14-13-etched.step/74lv132as14-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lv132as14-13.step/74lv132as14-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (9 pp, sha256
1a7170245e2ce44c, retrieved 2026-10-21, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).