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SN74HCS86DR

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Texas Instruments Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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SN74HCS86DR

Texas Instruments · Gates · SOIC-14

SN74HCS86DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Channel 1, Input A, Schmitt-trigger input that must not be left floating.
2 1B input Channel 1, Input B, Schmitt-trigger input that must not be left floating.
3 1Y output Channel 1, Output Y (A XOR B), drives ±7.8mA at 6V VCC.
4 2A input Channel 2, Input A, Schmitt-trigger input that must not be left floating.
5 2B input Channel 2, Input B, Schmitt-trigger input that must not be left floating.
6 2Y output Channel 2, Output Y (A XOR B), drives ±7.8mA at 6V VCC.
7 GND power_in Ground.
8 3Y output Channel 3, Output Y (A XOR B), drives ±7.8mA at 6V VCC.
9 3A input Channel 3, Input A, Schmitt-trigger input that must not be left floating.
10 3B input Channel 3, Input B, Schmitt-trigger input that must not be left floating.
11 4Y output Channel 4, Output Y (A XOR B), drives ±7.8mA at 6V VCC.
12 4A input Channel 4, Input A, Schmitt-trigger input that must not be left floating.
13 4B input Channel 4, Input B, Schmitt-trigger input that must not be left floating.
14 VCC power_in Positive supply, 2V to 6V recommended, with a 0.1µF bypass capacitor placed close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 2 5 6 V 4
Ambient temperature TA -40 125 °C 4
Supply voltage VCC -0.5 7 V 4
Input clamp current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 4
Output clamp current IOK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 4
Continuous output current IO -35 35 mA VO = 0 to VCC 4
Continuous current through VCC or GND -70 70 mA 4
Junction temperature TJ 150 °C Guaranteed by design 4
Storage temperature Tstg -65 150 °C 4
ESD HBM V(ESD) -4000 4000 V HBM per AEC Q100-002 4
ESD CDM V(ESD) -1500 1500 V CDM per AEC Q100-011 4
Positive switching threshold VT+ 1.13 1.26 1.37 V VCC = 2V 5
Positive switching threshold VT+ 2.31 2.47 2.66 V VCC = 4.5V 5
Positive switching threshold VT+ 2.99 3.18 3.44 V VCC = 6V 5
Negative switching threshold VT- 0.55 0.62 0.71 V VCC = 2V 5
Negative switching threshold VT- 1.21 1.36 1.5 V VCC = 4.5V 5
Negative switching threshold VT- 1.56 1.79 1.99 V VCC = 6V 5
Hysteresis VT+ - VT- ΔVT 0.54 0.64 0.71 V VCC = 2V 5
Hysteresis VT+ - VT- ΔVT 0.94 1.11 1.27 V VCC = 4.5V 5
Hysteresis VT+ - VT- ΔVT 1.2 1.38 1.57 V VCC = 6V 5
High-level output voltage VOH 4 4.3 V VI = VIH or VIL, IOH = -6mA, VCC = 4.5V 5
High-level output voltage VOH 5.4 5.75 V VI = VIH or VIL, IOH = -7.8mA, VCC = 6V 5
Low-level output voltage VOL 0.002 0.1 V VI = VIH or VIL, IOL = 20µA, VCC = 2V to 6V 5
Low-level output voltage VOL 0.18 0.3 V VI = VIH or VIL, IOL = 4mA, VCC = 4.5V 5
Low-level output voltage VOL 0.22 0.33 V VI = VIH or VIL, IOL = 7.8mA, VCC = 6V 5
Input leakage current II -1000 100 1000 nA VI = VCC or 0, VCC = 6V 5
Supply current ICC 0.1 2 µA VI = VCC or 0, IO = 0, VCC = 6V 5
Input capacitance Ci 5 pF VCC = 2V to 6V 5
Propagation delay A or B to Y tpd 15 36 ns CL = 50 pF, VCC = 2 V 6
Propagation delay A or B to Y tpd 7 13 ns CL = 50 pF, VCC = 4.5 V 6
Propagation delay A or B to Y tpd 6 12 ns CL = 50 pF, VCC = 6 V 6
Transition-time tt 9 16 ns CL = 50 pF, VCC = 2 V 6
Transition-time tt 5 9 ns CL = 50 pF, VCC = 4.5 V 6
Transition-time tt 4 8 ns CL = 50 pF, VCC = 6 V 6
Junction-to-ambient thermal resistance RθJA 133.6 °C/W D (SOIC) 14 pins 5
Junction-to-case (top) thermal resistance RθJC(top) 89 °C/W D (SOIC) 14 pins 5
Junction-to-board thermal resistance RθJB 89.5 °C/W D (SOIC) 14 pins 5
Junction-to-top characterization parameter ΨJT 45.5 °C/W D (SOIC) 14 pins 5
Junction-to-board characterization parameter ΨJB 89.1 °C/W D (SOIC) 14 pins 5

CAD (KiCad official)

  • Symbol: SN74HCS86DR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: sn74hcs86dr-etched.step / sn74hcs86dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hcs86dr.step / sn74hcs86dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 8f4bb222884bf20c, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF