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ISO6721FBQDRQ1

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Texas Instruments Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsignal isolation devicesiso6721fbqdrq1factory-2.0.0extractor-text

Verified ISO6721FBQDRQ1

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ISO6721FBQDRQ1 · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 61-page datasheet
  • ✓distributor: lcsc C5216427, digikey 296-ISO6721FBQDRQ1TR-ND, mouser 595-ISO6721FBQDRQ1
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-dwmbtz2c/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ iso6721fbqdrq1.kicad_sym✓ iso6721fbqdrq1.kicad_mod✓ iso6721fbqdrq1.step
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Contents

README

markdown

ISO6721FBQDRQ1

Texas Instruments · Digital Isolators · SOIC-8

ISO6721FBQDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC1 power_in Power supply for the input-side circuit (VCC1), referenced to GND1.
2 OUTA output Output of channel A, on the output side of the isolation barrier.
3 INB input Input of channel B, on the input side of the isolation barrier.
4 GND1 power_in Ground connection for VCC1 on the input side.
5 GND2 power_in Ground connection for VCC2 on the output side.
6 OUTB output Output of channel B, on the output side of the isolation barrier.
7 INA input Input of channel A, on the input side of the isolation barrier.
8 VCC2 power_in Power supply for the output-side circuit (VCC2), referenced to GND2.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Signal Isolation Devices
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage Side 1 VCC1 1.71 1.89 V VCC = 1.8V 6
Supply Voltage Side 1 VCC1 2.25 5.5 V VCC = 2.5V to 5V 6
Supply Voltage Side 2 VCC2 1.71 1.89 V VCC = 1.8V 6
Supply Voltage Side 2 VCC2 2.25 5.5 V VCC = 2.5V to 5V 6
High level output current IOH -4 mA VCCO = 5V 6
High level output current IOH -2 mA VCCO = 3.3V 6
High level output current IOH -1 mA VCCO = 2.5V 6
Low level output current IOL 4 mA VCCO = 5V 6
Low level output current IOL 2 mA VCCO = 3.3V 6
Low level output current IOL 1 mA VCCO = 2.5V 6
Data Rate DR 0 50 Mbps 6
Ambient temperature TA -40 25 125 °C 6
Supply voltage VCC1 to GND1 VCC1 -0.5 6 V 5
Supply voltage VCC2 to GND2 VCC2 -0.5 6 V 5
Output Current Io -15 15 mA 5
Operating junction temperature TJ 150 °C 5
Storage temperature Tstg -65 150 °C 5
Junction-to-ambient thermal resistance (D SOIC, ISO672xB) RθJA 104.6 °C/W 7
Junction-to-case (top) thermal resistance (D SOIC, ISO672xB) RθJC(top) 48.9 °C/W 7
Junction-to-board thermal resistance (D SOIC, ISO672xB) RθJB 52.9 °C/W 7
Maximum power dissipation (both sides), ISO6721 PD 73 mW VCC1 = VCC2 = 5.5V, TJ = 150°C, CL = 15pF, Input a 25MHz 50% duty cycle square wave 7
Maximum power dissipation (side-1), ISO6721 PD1 37 mW VCC1 = VCC2 = 5.5V, TJ = 150°C, CL = 15pF, Input a 25MHz 50% duty cycle square wave 7
Maximum power dissipation (side-2), ISO6721 PD2 37 mW VCC1 = VCC2 = 5.5V, TJ = 150°C, CL = 15pF, Input a 25MHz 50% duty cycle square wave 7
Maximum isolation working voltage (D package) VIOWM 450 VRMS AC voltage (sine wave); time-dependent dielectric breakdown (TDDB) test 8
Maximum transient isolation voltage (D package) VIOTM 4242 VPK VTEST = VIOTM, t = 60s (qualification); VTEST = 1.2 × VIOTM, t = 1s (100% production) 8
Maximum impulse voltage (D package) VIMP 5000 VPK Tested in air, 1.2/50-µs waveform per IEC 62368-1 8
Maximum surge isolation voltage (D package) VIOSM 6500 VPK VIOSM ≥ 1.3 x VIMP; tested in oil (qualification test), 1.2/50-µs waveform per IEC 62368-1 8
High-level output voltage VOL 0.4 V IOL = 4mA; See Figure 6-1 13
Low-level output voltage VOL 0.2 V IOL = 2mA; See Figure 6-1 15
Low-level output voltage VOL 0.1 V IOL = 1mA; See Figure 6-1 17
Low-level output voltage VOL 0.1 V IOL = 1mA; See Figure 6-1 19
Common mode transient immunity CMTI 100 150 kV/µs VI = VCC or 0V, VCM = 1200V 13
Input Capacitance Ci 2.8 pF VI = VCC/2 + 0.4×sin(2πft), f = 2MHz, VCC = 5V 13
Supply current - DC signal (F suffix, ISO6721) ICC1, ICC2 2.3 3.5 mA VI = 0V (ISO6721); VI = VCCI (ISO6721 with F suffix), VCC = 5V 13
Supply current - AC signal 1Mbps (ISO6721) ICC1, ICC2 1.9 2.9 mA All channels switching with square wave clock input; CL = 15pF; 1Mbps; VCC = 5V 13
Supply current - AC signal 10Mbps (ISO6721) ICC1, ICC2 2.5 3.6 mA All channels switching with square wave clock input; CL = 15pF; 10Mbps; VCC = 5V 13
Supply current - AC signal 50Mbps (ISO6721) ICC1, ICC2 5.2 6.7 mA All channels switching with square wave clock input; CL = 15pF; 50Mbps; VCC = 5V 13
Supply current - DC signal (F suffix, ISO6721) ICC1, ICC2 2.3 3.5 mA VI = 0V (ISO6721); VI = VCCI (ISO6721 with F suffix), VCC = 3.3V 15
Supply current - AC signal 10Mbps (ISO6721) ICC1, ICC2 2.3 3.3 mA All channels switching with square wave clock input; CL = 15pF; 10Mbps; VCC = 3.3V 15
Supply current - AC signal 50Mbps (ISO6721) ICC1, ICC2 4.2 5.5 mA All channels switching with square wave clock input; CL = 15pF; 50Mbps; VCC = 3.3V 15
Supply current - DC signal (F suffix, ISO6721) ICC1, ICC2 2.3 3.5 mA VI = 0V (ISO6721); VI = VCCI (ISO6721 with F suffix), VCC = 2.5V 17
Supply current - AC signal 10Mbps (ISO6721) ICC1, ICC2 2.1 3.2 mA All channels switching with square wave clock input; CL = 15pF; 10Mbps; VCC = 2.5V 17
Supply current - AC signal 50Mbps (ISO6721) ICC1, ICC2 3.6 4.9 mA All channels switching with square wave clock input; CL = 15pF; 50Mbps; VCC = 2.5V 17
Supply current - DC signal (F suffix, ISO6721) ICC1, ICC2 2.1 3.4 mA VI = 0V (ISO6721); VI = VCCI (ISO6721 with F suffix), VCC = 1.8V 19
Supply current - AC signal 10Mbps (ISO6721) ICC1, ICC2 1.9 3 mA All channels switching with square wave clock input; CL = 15pF; 10Mbps; VCC = 1.8V 19
Supply current - AC signal 50Mbps (ISO6721) ICC1, ICC2 3 4.2 mA All channels switching with square wave clock input; CL = 15pF; 50Mbps; VCC = 1.8V 19
Propagation delay time tPLH, tPHL 11 18 ns See Figure 6-1; VCC = 5V 21
Propagation delay time tPLH, tPHL 12 20.5 ns See Figure 6-1; VCC = 2.5V 22
Propagation delay time tPLH, tPHL 15 24 ns See Figure 6-1; VCC = 1.8V 22
Pulse width distortion PWD 0.2 7 ns /tPHL, tPLH/; See Figure 6-1; VCC = 5V 21
Pulse width distortion PWD 0.5 7 ns /tPHL, tPLH/; See Figure 6-1; VCC = 3.3V 21
Pulse width distortion PWD 0.6 7.1 ns /tPHL, tPLH/; See Figure 6-1; VCC = 2.5V 22
Pulse width distortion PWD 0.7 8.2 ns /tPHL, tPLH/; See Figure 6-1; VCC = 1.8V 22
Default output delay time from input power loss tDO 0.1 0.3 µs Measured from the time VCC goes below 1.2V. See Figure 6-2 21

CAD (KiCad official)

  • Symbol: ISO6721FBQDRQ1
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: iso6721fbqdrq1-etched.step / iso6721fbqdrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); iso6721fbqdrq1.step / iso6721fbqdrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (61 pp, sha256 bffa2110449af290, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF