component
74AHCT132D
Public Made by Adomby adom
Nexperia Logic Gates, SO-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74AHCT132D
Nexperia · Logic Gates · SO-14
74AHCT132D from Nexperia, in a SO-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input A of gate 1, a Schmitt-trigger input that is overvoltage tolerant to 5.5 V. |
| 2 | 1B | input | Data input B of gate 1, a Schmitt-trigger input that is overvoltage tolerant to 5.5 V. |
| 3 | 1Y | output | Data output Y of gate 1 (NAND of 1A and 1B). |
| 4 | 2A | input | Data input A of gate 2, a Schmitt-trigger input that is overvoltage tolerant to 5.5 V. |
| 5 | 2B | input | Data input B of gate 2, a Schmitt-trigger input that is overvoltage tolerant to 5.5 V. |
| 6 | 2Y | output | Data output Y of gate 2 (NAND of 2A and 2B). |
| 7 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 8 | 3Y | output | Data output Y of gate 3 (NAND of 3A and 3B). |
| 9 | 3A | input | Data input A of gate 3, a Schmitt-trigger input that is overvoltage tolerant to 5.5 V. |
| 10 | 3B | input | Data input B of gate 3, a Schmitt-trigger input that is overvoltage tolerant to 5.5 V. |
| 11 | 4Y | output | Data output Y of gate 4 (NAND of 4A and 4B). |
| 12 | 4A | input | Data input A of gate 4, a Schmitt-trigger input that is overvoltage tolerant to 5.5 V. |
| 13 | 4B | input | Data input B of gate 4, a Schmitt-trigger input that is overvoltage tolerant to 5.5 V. |
| 14 | VCC | power_in | Supply voltage, 4.5 V to 5.5 V for the 74AHCT132 (recommended operating range). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SO-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| input voltage | VI | -0.5 | 7 | V | 4 | ||
| input clamping current | IIK | -20 | mA | VI < -0.5 V | 4 | ||
| output clamping current | IOK | -20 | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 4 | |
| output current | IO | -25 | 25 | mA | VO = -0.5 V to (VCC + 0.5 V) | 4 | |
| supply current | ICC | 75 | mA | 4 | |||
| ground current | IGND | -75 | mA | 4 | |||
| storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| total power dissipation | Ptot | 500 | mW | Tamb = -40 °C to +125 °C | 4 | ||
| supply voltage | VCC | 4.5 | 5 | 5.5 | V | 4 | |
| input voltage | VI | 0 | 5.5 | V | 4 | ||
| output voltage | VO | 0 | V | 4 | |||
| ambient temperature | Tamb | -40 | 25 | 125 | °C | 4 | |
| input transition rise and fall rate | Δt/ΔV | 20 | ns/V | VCC = 5.0 V ± 0.5 V | 4 | ||
| HIGH-level output voltage | VOH | 4.4 | 4.5 | V | VI = VT+ or VT-; IO = -50 μA; VCC = 4.5 V; 25 °C | 5 | |
| HIGH-level output voltage | VOH | 4.4 | V | VI = VT+ or VT-; IO = -50 μA; VCC = 4.5 V; -40 °C to +85 °C | 5 | ||
| HIGH-level output voltage | VOH | 3.94 | V | VI = VT+ or VT-; IO = -8.0 mA; VCC = 4.5 V; 25 °C | 5 | ||
| HIGH-level output voltage | VOH | 3.8 | V | VI = VT+ or VT-; IO = -8.0 mA; VCC = 4.5 V; -40 °C to +85 °C | 5 | ||
| HIGH-level output voltage | VOH | 3.7 | V | VI = VT+ or VT-; IO = -8.0 mA; VCC = 4.5 V; -40 °C to +125 °C | 5 | ||
| LOW-level output voltage | VOL | 0 | 0.1 | V | VI = VT+ or VT-; IO = 50 μA; VCC = 4.5 V; 25 °C | 5 | |
| LOW-level output voltage | VOL | 0.1 | V | VI = VT+ or VT-; IO = 50 μA; VCC = 4.5 V; -40 °C to +85 °C | 5 | ||
| LOW-level output voltage | VOL | 0.36 | V | VI = VT+ or VT-; IO = 8.0 mA; VCC = 4.5 V; 25 °C | 5 | ||
| LOW-level output voltage | VOL | 0.44 | V | VI = VT+ or VT-; IO = 8.0 mA; VCC = 4.5 V; -40 °C to +85 °C | 5 | ||
| LOW-level output voltage | VOL | 0.55 | V | VI = VT+ or VT-; IO = 8.0 mA; VCC = 4.5 V; -40 °C to +125 °C | 5 | ||
| input leakage current | II | 0.1 | μA | VI = 5.5 V or GND; VCC = 0 V to 5.5 V; 25 °C | 5 | ||
| input leakage current | II | 1 | μA | VI = 5.5 V or GND; VCC = 0 V to 5.5 V; -40 °C to +85 °C | 5 | ||
| input leakage current | II | 2 | μA | VI = 5.5 V or GND; VCC = 0 V to 5.5 V; -40 °C to +125 °C | 5 | ||
| supply current | ICC | 2 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V; 25 °C | 5 | ||
| supply current | ICC | 20 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V; -40 °C to +85 °C | 5 | ||
| supply current | ICC | 40 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V; -40 °C to +125 °C | 5 | ||
| additional supply current | ΔICC | 1.35 | mA | per input pin; VI = VCC - 2.1 V; other pins at VCC or GND; IO = 0 A; VCC = 4.5 V to 5.5 V; 25 °C | 5 | ||
| additional supply current | ΔICC | 1.5 | mA | per input pin; VI = VCC - 2.1 V; other pins at VCC or GND; IO = 0 A; VCC = 4.5 V to 5.5 V; -40 °C to +85 °C | 5 | ||
| input capacitance | CI | 3 | 10 | pF | VI = VCC or GND; 25 °C | 5 | |
| propagation delay | tpd | 3.5 | 7 | ns | nA, nB to nY; see Fig. 4; CL = 15 pF; VCC = 4.5 V to 5.5 V; 25 °C | 6 | |
| propagation delay | tpd | 1 | 8 | ns | nA, nB to nY; see Fig. 4; CL = 15 pF; VCC = 4.5 V to 5.5 V; -40 °C to +85 °C | 6 | |
| propagation delay | tpd | 1 | 9 | ns | nA, nB to nY; see Fig. 4; CL = 15 pF; VCC = 4.5 V to 5.5 V; -40 °C to +125 °C | 6 | |
| propagation delay | tpd | 5 | 8 | ns | nA, nB to nY; see Fig. 4; CL = 50 pF; VCC = 4.5 V to 5.5 V; 25 °C | 6 | |
| propagation delay | tpd | 1 | 10 | ns | nA, nB to nY; see Fig. 4; CL = 50 pF; VCC = 4.5 V to 5.5 V; -40 °C to +125 °C | 6 | |
| positive-going threshold voltage | VT+ | 1.9 | V | VCC = 4.5 V; 25 °C | 8 | ||
| positive-going threshold voltage | VT+ | 2.1 | V | VCC = 5.5 V; 25 °C | 8 | ||
| negative-going threshold voltage | VT- | 0.5 | V | VCC = 4.5 V; 25 °C | 8 | ||
| negative-going threshold voltage | VT- | 0.6 | V | VCC = 5.5 V; 25 °C | 8 | ||
| hysteresis voltage | VH | 0.3 | 1.4 | V | VCC = 4.5 V; 25 °C | 8 | |
| hysteresis voltage | VH | 0.3 | 1.5 | V | VCC = 5.5 V; 25 °C | 8 |
CAD (KiCad official)
- Symbol:
74AHCT132D - Footprint:
Adom_Gen:Nexperia_74 - 3D model: SO-14 (KiCad packages3D, STEP)
- 3D model files:
74ahct132d-etched.step/74ahct132d-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74ahct132d.step/74ahct132d.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (16 pp, sha256
8ea2c6812c0971c8, retrieved 2026-10-21, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).