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SI3440DV-VB
Public Made by Adomby adom
VBsemi Elec MOSFETs, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSI3440DV-VB
VBsemi Elec · MOSFETs · SOT-23-6
SI3440DV-VB from VBsemi Elec, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D | passive | Drain of the 100 V N-channel MOSFET, internally common with the other drain pins (pins 1, 2, 5, 6). |
| 2 | D | passive | Drain of the 100 V N-channel MOSFET, internally common with the other drain pins (pins 1, 2, 5, 6). |
| 3 | G | input | Gate; the gate-source voltage is rated ±20 V and the threshold voltage VGS(th) is 1.0 to 2.5 V. |
| 4 | S | passive | Source of the N-channel MOSFET; the continuous source-drain diode current is 2.1 A at TC = 25 °C. |
| 5 | D | passive | Drain of the 100 V N-channel MOSFET, internally common with the other drain pins (pins 1, 2, 5, 6). |
| 6 | D | passive | Drain of the 100 V N-channel MOSFET, internally common with the other drain pins (pins 1, 2, 5, 6). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | VBsemi Elec |
| Package | SOT-23-6 |
| Category | Transistors |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | 100 | V | TA = 25 °C | 1 | ||
| Gate-Source Voltage | VGS | -20 | 20 | V | TA = 25 °C | 1 | |
| Continuous Drain Current | ID | 3.2 | A | TJ = 150 °C, TC = 25 °C | 1 | ||
| Continuous Drain Current | ID | 2.8 | A | TJ = 150 °C, TC = 70 °C | 1 | ||
| Continuous Drain Current | ID | 3 | A | TJ = 150 °C, TA = 25 °C | 1 | ||
| Continuous Drain Current | ID | 2.4 | A | TJ = 150 °C, TA = 70 °C | 1 | ||
| Pulsed Drain Current | IDM | 25 | A | t = 300 µs | 1 | ||
| Continuous Source-Drain Diode Current | IS | 2.1 | A | TC = 25 °C | 1 | ||
| Continuous Source-Drain Diode Current | IS | 1.1 | A | TA = 25 °C | 1 | ||
| Maximum Power Dissipation | PD | 2.5 | W | TC = 25 °C | 1 | ||
| Maximum Power Dissipation | PD | 1.6 | W | TC = 70 °C | 1 | ||
| Maximum Power Dissipation | PD | 1.3 | W | TA = 25 °C | 1 | ||
| Maximum Power Dissipation | PD | 0.8 | W | TA = 70 °C | 1 | ||
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | 150 | °C | 1 | ||
| Soldering Peak Temperature | 260 | °C | Soldering recommendations | 1 | |||
| Junction-to-Ambient Thermal Resistance | RthJA | 75 | 100 | °C/W | t ≤ 5 s, surface mounted on 1" x 1" FR4 | 1 | |
| Junction-to-Foot (Drain) Thermal Resistance | RthJF | 40 | 50 | °C/W | Steady State | 1 | |
| Drain-Source Breakdown Voltage | VDS | 100 | V | VGS = 0 V, ID = 250 µA | 2 | ||
| Gate-Source Threshold Voltage | VGS(th) | 1 | 2.5 | V | VDS = VGS, ID = 250 µA | 2 | |
| Gate-Source Leakage | IGSS | -100 | 100 | nA | VDS = 0 V, VGS = ± 20 V | 2 | |
| Zero Gate Voltage Drain Current | IDSS | 1 | µA | VDS = 100 V, VGS = 0 V | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 10 | µA | VDS = 100 V, VGS = 0 V, TJ = 70 °C | 2 | ||
| On-State Drain Current | ID(on) | 20 | A | VDS ≥ 5 V, VGS = 10 V | 2 | ||
| Drain-Source On-State Resistance | RDS(on) | 0.095 | Ω | VGS = 10 V, ID = 3.0 A | 2 | ||
| Drain-Source On-State Resistance | RDS(on) | 0.105 | Ω | VGS = 4.5 V, ID = 2 A | 2 | ||
| Total Gate Charge | Qg | 8.2 | 13 | nC | VDS = 50 V, VGS = 10 V, ID = 3.0 A | 2 | |
| Total Gate Charge | Qg | 4.2 | 7 | nC | VDS = 50 V, VGS = 4.5 V, ID = 3.0 A | 2 | |
| Gate Resistance | Rg | 2.5 | 12.6 | 25.2 | Ω | f = 1 MHz | 2 |
| Turn-On Delay Time | td(on) | 6 | 12 | ns | VDD = 50 V, RL = 3.4 Ω, ID ≅ 4.4 A, VGEN = 4.5 V, Rg = 1 Ω | 2 | |
| Rise Time | tr | 20 | 30 | ns | VDD = 50 V, RL = 3.4 Ω, ID ≅ 4.4 A, VGEN = 4.5 V, Rg = 1 Ω | 2 | |
| Turn-Off Delay Time | td(off) | 14 | 21 | ns | VDD = 50 V, RL = 3.4 Ω, ID ≅ 4.4 A, VGEN = 4.5 V, Rg = 1 Ω | 2 | |
| Fall Time | tf | 10 | 20 | ns | VDD = 50 V, RL = 3.4 Ω, ID ≅ 4.4 A, VGEN = 4.5 V, Rg = 1 Ω | 2 | |
| Rise Time | tr | 11 | 20 | ns | VDD = 50 V, RL = 3.4 Ω, ID ≅ 2.4 A, VGEN = 10 V, Rg = 1 Ω | 2 | |
| Turn-Off Delay Time | td(off) | 20 | 30 | ns | VDD = 50 V, RL = 3.4 Ω, ID ≅ 2.4 A, VGEN = 10 V, Rg = 1 Ω | 2 | |
| Fall Time | tf | 7 | 14 | ns | VDD = 50 V, RL = 3.4 Ω, ID ≅ 2.4 A, VGEN = 10 V, Rg = 1 Ω | 2 | |
| Pulse Diode Forward Current | ISM | 25 | A | 2 | |||
| Continuous Source-Drain Diode Current | IS | 2.1 | A | TC = 25 °C | 2 | ||
| Body Diode Voltage | VSD | 0.82 | 1.2 | V | IS = 2.4 A, VGS = 0 V | 2 | |
| Body Diode Reverse Recovery Time | trr | 13 | 20 | ns | IF = 2.4 A, dI/dt = 100 A/µs, TJ = 25 °C | 2 | |
| Body Diode Reverse Recovery Charge | Qrr | 6 | 12 | nC | IF = 2.4 A, dI/dt = 100 A/µs, TJ = 25 °C | 2 | |
| Forward Transconductance | gfs | 24 | S | VDS = 50 V, ID = 3.0 A | 2 | ||
| Output Capacitance | Coss | 100 | pF | VDS = 50 V, VGS = 0 V, f = 1 MHz | 2 | ||
| Reverse Transfer Capacitance | Crss | 42 | pF | VDS = 50 V, VGS = 0 V, f = 1 MHz | 2 | ||
| Input Capacitance | Ciss | 424 | pF | VDS = 50 V, VGS = 0 V, f = 1 MHz | 2 | ||
| Gate-Source Charge | Qgs | 1.4 | nC | VDS = 50 V, VGS = 4.5 V, ID = 3.0 A | 2 | ||
| Gate-Drain Charge | Qgd | 1.4 | nC | VDS = 50 V, VGS = 4.5 V, ID = 3.0 A | 2 |
CAD (KiCad official)
- Symbol:
SI3440DV-VB - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
si3440dv-vb-etched.step/si3440dv-vb-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);si3440dv-vb.step/si3440dv-vb.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: VBsemi Elec datasheet (9 pp, sha256
657ddc4c744a54a8, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).