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Contents

README

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TPS2331ID

Texas Instruments · Supervisor And Reset ICs · SOIC-14

TPS2331ID from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GATE output Connects to the gate of the external high-side N-channel MOSFET; the charge pump sources about 15 μA and generates gate-to-source voltages of 9 V-12 V.
2 DGND power_in Digital ground.
3 TIMER output A capacitor on TIMER sets the circuit-breaker deglitch time; the latch sets at about 0.5 V, and a minimum 50-pF capacitor to ground is strongly recommended in high-power or high-temperature applications.
4 VREG output Output of the internal low-dropout regulator, less than 5.5 V, requiring a 0.1-μF ceramic capacitor to ground for stable operation and noise rejection.
5 VSENSE input Power-good sense input; PWRGD is pulled low when VSENSE falls below approximately 1.23 V.
6 AGND power_in Analog ground, to be connected to DGND as close as possible.
7 ISENSE input Current-sense input connected to the external MOSFET drain; an overcurrent condition exists when ISENSE is pulled below ISET, and VI(ISENSE) should never exceed VI(IN).
8 IN power_in Input voltage supply for the device and the external MOSFET drive, specified for 3 V to 13 V input; VI(IN) must not be exceeded by ISENSE or ISET.
9 AGND power_in Analog ground, to be connected to DGND as close as possible.
10 ISET input Sets the circuit-breaker threshold through an external resistor to IN with an internal 50-μA current source; VI(ISET) should never exceed VI(IN).
11 FAULT output Open-drain overcurrent fault flag that is pulled low when the TIMER reaches 0.5 V and the device latches off.
12 PWRGD output Open-drain power-good output, pulled low during an undervoltage on VSENSE (reference about 1.23 V) with a 20-μs deglitch filter.
13 ENABLE input Active-high enable on the TPS2331 (active-low on the TPS2330); holding it in the disabled state for more than 50 μs discharges the gate and output bulk capacitance.
14 DISCH output Connects to the source of the external N-channel MOSFET to discharge the load when the MOSFET is disabled, and serves as the reference for the internal gate-clamp circuitry.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Power Management (PMIC)
Pins 14

CAD (KiCad official)

  • Symbol: TPS2331ID
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: tps2331id-etched.step / tps2331id-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps2331id.step / tps2331id.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (29 pp, sha256 d6a67c69fef8f4da, retrieved 2026-10-08, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF