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Contents

README

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SiT1602AI-22-33E-8.000000D

SiTime · Pre-programmed Oscillators · SMD3225-4P

SiT1602AI-22-33E-8.000000D from SiTime, in a SMD3225-4P. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE/ST input Output enable or standby control: H or open gives specified frequency output; L disables output (high impedance in OE mode, output low with weak pull-down and sleep mode in ST mode); VIH min 70% Vdd, VIL max 30% Vdd.
2 GND power_in Electrical ground; a 0.1 µF capacitor between Vdd and GND is required.
3 OUT output Oscillator LVCMOS output.
4 VDD power_in Power supply voltage (3.3V ±10%, 2.97 V to 3.63 V for this -33 part; absolute max 4 V) with a required 0.1 µF capacitor to GND.

Key specifications

Parameter Value
Manufacturer SiTime
Package SMD3225-4P
Category Crystals/Oscillators/Resonators
Pins 4

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Frequency Stability F_stab -25 25 PPM Inclusive of initial tolerance at 25°C, 1st year aging at 25°C, and variations over operating temperature, rated power supply voltage and load 1
Operating Temperature Range T_use -40 85 °C Industrial 1
Supply Voltage Vdd 2.97 3.3 3.63 V 3.3V option 1
Current Consumption Idd 3.8 4.5 mA No load condition, f = 20 MHz, Vdd = 2.8V to 3.3V 1
OE Disable Current I_OD 4 mA Vdd = 2.5V to 3.3V, OE = GND, output is Weakly Pulled Down 1
Standby Current I_std 2.6 4.3 µA ST = GND, Vdd = 2.8V to 3.3V, Output is Weakly Pulled Down 1
Duty Cycle DC 45 55 % All Vdds 1
Rise/Fall Time Tr, Tf 1 2 ns Vdd = 2.5V, 2.8V, 3.0V or 3.3V, 20% - 80% 1
Output High Voltage VOH 90 % Vdd IOH = -4 mA (Vdd = 3.0V or 3.3V) 1
Output Low Voltage VOL 10 % Vdd IOL = 4 mA (Vdd = 3.0V or 3.3V) 1
Input High Voltage VIH 70 % Vdd Pin 1, OE or ST 1
Input Low Voltage VIL 30 % Vdd Pin 1, OE or ST 1
Input Pull-up Impedance Z_in 87 100 kΩ Pin 1, OE logic high or logic low, or ST logic high 1
Startup Time T_start 5 ms Measured from the time Vdd reaches its rated minimum value 2
Enable/Disable Time T_oe 130 ns f = 110 MHz. For other frequencies, T_oe = 100 ns + 3 * cycles 2
RMS Period Jitter T_jitt 1.76 3 ps f = 75 MHz, Vdd = 2.5V, 2.8V, 3.0V or 3.3V 2
RMS Phase Jitter (random) T_phj 0.5 0.9 ps f = 75 MHz, Integration bandwidth = 900 kHz to 7.5 MHz 2
RMS Phase Jitter (random) T_phj 1.3 2 ps f = 75 MHz, Integration bandwidth = 12 kHz to 20 MHz 2
Storage Temperature -65 150 °C 2
VDD VDD -0.5 4 V 2
Electrostatic Discharge 2000 V 2
Soldering Temperature 260 °C Follow standard Pb free soldering guidelines 2
Junction Temperature 150 °C 2
Thermal Resistance JA, 4 Layer Board θJA 109 °C/W 3225 package, 4 layer board 2
Thermal Resistance JA, 2 Layer Board θJA 212 °C/W 3225 package, 2 layer board 2
Thermal Resistance JC, Bottom θJC 27 °C/W 3225 package 2

CAD (KiCad official)

  • Symbol: SiT1602AI-22-33E-8.000000D
  • Footprint: Crystal:Crystal_SMD_3225-4Pin_3.2x2.5mm
  • 3D model: SMD3225-4P (KiCad packages3D, STEP)
  • 3D model files: sit1602ai-22-33e-8-000000d-etched.step / sit1602ai-22-33e-8-000000d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sit1602ai-22-33e-8-000000d.step / sit1602ai-22-33e-8-000000d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SiTime datasheet (16 pp, sha256 9145b2e5375738f7, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF