component
TEA1755T
Public Made by Adomby adom
NXP Semicon AC-DC Controllers & Regulators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTEA1755T
NXP Semicon · AC-DC Controllers & Regulators · SOIC-16
TEA1755T from NXP Semicon, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Supply voltage pin; the VCC capacitor is charged from the rectified mains through the HV pin during start-up until VCC passes Vstartup. |
| 2 | GND | power_in | Ground reference pin for the controller. |
| 3 | FBCTRL | input | Flyback control input; VFBCTRL varies between 0.77 V at minimum output power and 4.9 V at maximum output power, and a fault is assumed above 7.75 V. |
| 4 | FBAUX | input | Auxiliary winding input for demagnetization timing and flyback overvoltage protection; if left open or unconnected, the converter immediately stops. |
| 5 | LATCH | input | General-purpose protection input that must exceed the Ven(LATCH) voltage during start-up or the LATCH output is deactivated. |
| 6 | PFCCOMP | passive | PFC frequency compensation pin, with its clamp circuit activated during start-up. |
| 7 | VINSENSE | input | Mains voltage sense input; the PFC controller stops switching when VVINSENSE falls below Vstop(VINSENSE) and power-down mode is entered below Vth(pd). |
| 8 | PFCAUX | input | Auxiliary winding input for demagnetization timing of the PFC. |
| 9 | VOSENSE | input | Sense input for the PFC output voltage; the PFC controller stops switching when VVOSENSE exceeds VOVP(VOSENSE). |
| 10 | FBSENSE | input | Flyback current sense input that senses primary current across an external resistor and sources a 2.1 A offset current to set the minimum flyback peak current. |
| 11 | PFCSENSE | input | PFC current sense input, whose soft-start capacitor is charged during start-up. |
| 12 | PFCDRIVER | output | PFC gate-driver output. |
| 13 | FBDRIVER | output | Flyback gate-driver output. |
| 14 | PFCTIMER | passive | PFC override and switch-off delay timer pin. |
| 15 | HVS | unconnected | High-voltage safety spacer; not connected. |
| 16 | HV | input | High-voltage start-up and flyback valley sensing pin, connected to the flyback transformer center tap or the drain of MOSFET S2. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | NXP Semicon |
| Package | SOIC-16 |
| Category | Power Management ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC supply voltage | VCC | -0.4 | 38 | V | 21 | ||
| VLATCH voltage on pin LATCH | VLATCH | -0.4 | 10 | V | current limited | 21 | |
| VFBCTRL voltage on pin FBCTRL | VFBCTRL | -0.4 | 9 | V | 21 | ||
| VPFCCOMP voltage on pin PFCCOMP | VPFCCOMP | -0.4 | 5 | V | 21 | ||
| VVINSENSE voltage on pin VINSENSE | VVINSENSE | -0.4 | 10 | V | current limited | 21 | |
| VVOSENSE voltage on pin VOSENSE | VVOSENSE | -0.4 | 10 | V | current limited | 21 | |
| VPFCAUX voltage on pin PFCAUX | VPFCAUX | -25 | 25 | V | 21 | ||
| VFBSENSE voltage on pin FBSENSE | VFBSENSE | -0.4 | 5 | V | current limited | 21 | |
| VPFCSENSE voltage on pin PFCSENSE | VPFCSENSE | -0.4 | 5 | V | current limited | 21 | |
| VPFCTIMER voltage on pin PFCTIMER | VPFCTIMER | -0.4 | 10 | V | current limited | 21 | |
| VHV voltage on pin HV | VHV | -0.4 | 650 | V | 21 | ||
| IFBAUX current on pin FBAUX | IFBAUX | -1 | 1 | mA | 21 | ||
| IPFCSENSE current on pin PFCSENSE | IPFCSENSE | -1 | 10 | mA | 21 | ||
| IFBSENSE current on pin FBSENSE | IFBSENSE | -1 | 10 | mA | 21 | ||
| IFBDRIVER current on pin FBDRIVER | IFBDRIVER | -0.8 | 2 | A | duty cycle < 10 % | 21 | |
| IPFCDRIVER current on pin PFCDRIVER | IPFCDRIVER | -0.8 | 2 | A | duty cycle < 10 % | 21 | |
| IHV current on pin HV during start-up and restart | IHV | 8 | mA | 21 | |||
| IHV current on pin HV during start-up and restart (dV/dt) | IHV | -15 | 30 | mA | = 3 % due to dV/dt on HV pin | 21 | |
| Total power dissipation | Ptot | 0.6 | W | Tamb < 75 C | 21 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 21 | ||
| Junction temperature | Tj | -40 | 155 | °C | 21 | ||
| ESD voltage, human body model, pins 1 to 14 | VESD | -2 | 2 | kV | human body model; pins 1 to 14 | 21 | |
| ESD voltage, human body model, pin 16 (HV) | VESD | -2 | 2 | kV | human body model; pin 16 (HV) | 21 | |
| ESD voltage, charged device model | VESD | -500 | 500 | V | charged device model | 21 | |
| IHV current on pin HV | IHV | 0.9 | 1.1 | 1.3 | mA | VHV > 75 V; VCC < Vtrip | 22 |
| Trip voltage | Vtrip | 0.5 | 0.6 | 0.7 | V | 22 | |
| Start-up voltage | Vstartup | 21.3 | 22.3 | 23.3 | V | 22 | |
| Undervoltage lockout threshold voltage | Vth(UVLO) | 12.4 | 13.4 | 14.4 | V | 22 | |
| Hysteresis voltage | Vhys | 8.3 | 8.9 | 9.5 | V | Vstartup - Vth(UVLO) | 22 |
| Operating supply current | ICC(oper) | 2.45 | 2.7 | 2.95 | mA | no-load on pins FBDRIVER and PFCDRIVER; VFBCTRL = 5 V; fFB = fPFC = 100 kHz | 22 |
| Operating supply current in burst mode, flyback switching | ICC(oper) | 1.75 | 1.95 | 2.15 | mA | no-load on pins FBDRIVER and PFCDRIVER; flyback switching; VFBCTRL = 1.6 V; VPFCSENSE = 0 V | 22 |
| Operating supply current in burst mode, flyback not switching | ICC(oper) | 1.24 | 1.35 | 1.46 | mA | flyback not switching; VFBCTRL = 0 V; VPFCSENSE = 0 V | 22 |
| Protection supply current | ICC(prot) | 0.3 | 0.45 | 0.6 | mA | time-out protection triggered; VHV = 0 V | 22 |
| Stop voltage on pin VINSENSE | Vstop(VINSENSE) | 0.86 | 0.89 | 0.92 | V | 23 | |
| Start voltage on pin VINSENSE | Vstart(VINSENSE) | 1.12 | 1.16 | 1.2 | V | 23 | |
| Dual boost voltage high level | Vbst(dual) | 2.08 | 2.28 | 2.48 | V | high level | 23 |
| Maximum PFC sense voltage | Vsense(PFC)max | 465 | 495 | 525 | mV | dV/dt = 0 V/s | 24 |
| Maximum flyback sense voltage | Vsense(fb)max | 525 | 545 | 565 | mV | dV/dt = 0 V/s | 26 |
| Minimum flyback sense voltage | Vsense(fb)min | 221 | 232 | 243 | mV | dV/dt = 0 V/s | 26 |
| Maximum flyback on-time | ton(fb)max | 32.5 | 38.5 | 44.5 | µs | 25 | |
| Maximum flyback switching frequency | fsw(fb)max | 110 | 130 | 150 | kHz | 26 | |
| Maximum PFC switching frequency | fsw(PFC)max | 119 | 139 | 159 | kHz | 24 | |
| Switch-off threshold voltage on pin PFCTIMER | Vth(off)PFCTIMER | 4.2 | 4.4 | 4.6 | V | PFC override voltage | 25 |
| Trip voltage on pin FBCTRL | Vto(FBCTRL) | 7.3 | 7.75 | 8.2 | V | trip voltage | 26 |
| On-state burst mode threshold voltage on pin FBCTRL | Vth(burst)on | 2.2 | 2.4 | 2.6 | V | on pin FBCTRL | 26 |
| Off-state burst mode threshold voltage on pin FBCTRL | Vth(burst)off | 0.62 | 0.77 | 0.92 | V | on pin FBCTRL | 26 |
| Protection voltage on pin LATCH | Vprot(LATCH) | 469 | 494 | 519 | mV | 27 | |
| IC protection level temperature | Tpl(IC) | 135 | 145 | 155 | °C | 28 | |
| Thermal resistance from junction to ambient | Rth(j-a) | 127 | K/W | in free air; JEDEC test board | 22 | ||
| Thermal resistance from junction to case | Rth(j-c) | 36 | K/W | in free air; JEDEC test board | 22 |
CAD (KiCad official)
- Symbol:
TEA1755T - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
tea1755t-etched.step/tea1755t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tea1755t.step/tea1755t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: NXP Semicon datasheet (35 pp, sha256
b7d1a0d70f3644d9, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).