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Contents

README

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TK10P60W

TOSHIBA · MOSFETs · DPAK

TK10P60W from TOSHIBA, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate terminal of the MOSFET; the gate-source voltage is rated at ±30 V (VGSS) absolute maximum.
2 Drain (Heatsink) passive Drain terminal, also the heatsink tab; drain-source voltage is rated at 600 V (VDSS) and continuous drain current at 9.7 A (ID) absolute maximum.
3 Source passive Source terminal; the datasheet gives no source-pin-specific limit, but the body-diode reverse drain current is rated at 9.7 A DC (IDR) and 38.8 A pulsed (IDRP).

Key specifications

Parameter Value
Manufacturer TOSHIBA
Package DPAK
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source breakdown voltage V(BR)DSS 600 V ID = 10 mA, VGS = 0 V 3
Gate threshold voltage Vth 2.7 3.7 V VDS = 10 V, ID = 0.5 mA 3
MOSFET dv/dt ruggedness dv/dt 50 V/ns VDD = 0 to 400 V, ID = 4.9 A 3
Diode dv/dt ruggedness dv/dt 15 V/ns IDR = 4.9 A, VGS = 0 V, VDD = 400 V 3
Gate leakage current IGSS -1 1 µA VGS = ±30 V, VDS = 0 V 3
Drain cut-off current IDSS 10 µA VDS = 600 V, VGS = 0 V 3
Drain-source on-resistance RDS(ON) 0.327 0.43 Ω VGS = 10 V, ID = 4.9 A 3
Diode forward voltage VDSF -1.7 V IDR = 9.7 A, VGS = 0 V 3
Drain-source voltage VDSS 600 V 2
Gate-source voltage VGSS -30 30 V 2
Drain current (DC) ID 9.7 A Tc = 25 2
Drain current (pulsed) IDP 38.8 A Tc = 25 2
Power dissipation PD 80 W Tc = 25 2
Single-pulse avalanche energy EAS 121 mJ Note 2: VDD = 90 V, Tch = 25, L = 33.9 mH, RG = 25 Ω, IAR = 2.5 A 2
Avalanche current IAR 2.5 A 2
Reverse drain current (DC) IDR 9.7 A 2
Reverse drain current (pulsed) IDRP 38.8 A 2
Channel temperature Tch 150 Ensure channel temperature does not exceed 150 (Note 1) 2
Storage temperature Tstg -55 150 2
Channel-to-case thermal resistance Rth(ch-c) 1.57 /W 2

CAD (KiCad official)

  • Symbol: TK10P60W
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: DPAK (KiCad packages3D, STEP)
  • 3D model files: tk10p60w-etched.step / tk10p60w-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tk10p60w.step / tk10p60w.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TOSHIBA datasheet (10 pp, sha256 07627c65fba15080, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF