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STM32F767ZIT6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32f767zit6factory-2.0.0extractor-text
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Contents

README

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STM32F767ZIT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-144(20x20)

STM32F767ZIT6 from STMicroelectronics, in a LQFP-144(20x20). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5 V-tolerant I/O (FT) with TRACECLK, SPI4_SCK, SAI1_MCLK_A, QUADSPI_BK1_IO2, ETH_MII_TXD3, FMC_A23 and EVENTOUT alternate functions.
2 PE3 bidirectional 5 V-tolerant I/O (FT) with TRACED0, SAI1_SD_B, FMC_A19 and EVENTOUT alternate functions.
3 PE4 bidirectional 5 V-tolerant I/O (FT) with TRACED1, SPI4_NSS, SAI1_FS_A, DFSDM1_DATIN3, FMC_A20, DCMI_D4, LCD_B0 and EVENTOUT alternate functions.
4 PE5 bidirectional 5 V-tolerant I/O (FT) with TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A, DFSDM1_CKIN3, FMC_A21, DCMI_D6, LCD_G0 and EVENTOUT alternate functions.
5 PE6 bidirectional 5 V-tolerant I/O (FT) with TRACED3, TIM1_BKIN2, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, SAI2_MCLK_B, FMC_A22, DCMI_D7, LCD_G1 and EVENTOUT alternate functions.
6 VBAT power_in Backup supply pin powering the RTC, 32 backup registers and backup SRAM when VDD is not present.
7 PC13 bidirectional 5 V-tolerant I/O supplied through the power switch (3 mA sink limit, max 2 MHz with 30 pF load, not a current source), with RTC_TAMP1/RTC_TS/RTC_OUT/WKUP4 additional functions and EVENTOUT.
8 PC14-OSC32_IN bidirectional I/O supplied through the power switch (3 mA sink limit, max 2 MHz with 30 pF load), also the 32 kHz oscillator input (OSC32_IN); 5 V tolerant except in oscillator mode.
9 PC15-OSC32_OUT bidirectional I/O supplied through the power switch (3 mA sink limit, max 2 MHz with 30 pF load), also the 32 kHz oscillator output (OSC32_OUT); 5 V tolerant except in oscillator mode.
10 PF0 bidirectional 5 V-tolerant I/O (FT) with I2C2_SDA, FMC_A0 and EVENTOUT alternate functions.
11 PF1 bidirectional 5 V-tolerant I/O (FT) with I2C2_SCL, FMC_A1 and EVENTOUT alternate functions.
12 PF2 bidirectional 5 V-tolerant I/O (FT) with I2C2_SMBA, FMC_A2 and EVENTOUT alternate functions.
13 PF3 bidirectional 5 V-tolerant I/O (FT) with FMC_A3 and EVENTOUT alternate functions and ADC3_IN9 analog input.
14 PF4 bidirectional 5 V-tolerant I/O (FT) with FMC_A4 and EVENTOUT alternate functions and ADC3_IN14 analog input.
15 PF5 bidirectional 5 V-tolerant I/O (FT) with FMC_A5 and EVENTOUT alternate functions and ADC3_IN15 analog input.
16 VSS power_in Ground supply pin.
17 VDD power_in Digital supply pin (application supply 1.7 V to 3.6 V).
18 PF6 bidirectional 5 V-tolerant I/O (FT) with TIM10_CH1, SPI5_NSS, SAI1_SD_B, UART7_RX, QUADSPI_BK1_IO3 and EVENTOUT alternate functions and ADC3_IN4 analog input.
19 PF7 bidirectional 5 V-tolerant I/O (FT) with TIM11_CH1, SPI5_SCK, SAI1_MCLK_B, UART7_TX, QUADSPI_BK1_IO2 and EVENTOUT alternate functions and ADC3_IN5 analog input.
20 PF8 bidirectional 5 V-tolerant I/O (FT) with SPI5_MISO, SAI1_SCK_B, UART7_RTS, TIM13_CH1, QUADSPI_BK1_IO0 and EVENTOUT alternate functions and ADC3_IN6 analog input.
21 PF9 bidirectional 5 V-tolerant I/O (FT) with SPI5_MOSI, SAI1_FS_B, UART7_CTS, TIM14_CH1, QUADSPI_BK1_IO1 and EVENTOUT alternate functions and ADC3_IN7 analog input.
22 PF10 bidirectional 5 V-tolerant I/O (FT) with QUADSPI_CLK, DCMI_D11, LCD_DE and EVENTOUT alternate functions and ADC3_IN8 analog input.
23 PH0-OSC_IN bidirectional I/O that is also the 4-26 MHz main oscillator input (OSC_IN); 5 V tolerant except in oscillator mode.
24 PH1-OSC_OUT bidirectional I/O that is also the 4-26 MHz main oscillator output (OSC_OUT); 5 V tolerant except in oscillator mode.
25 NRST bidirectional Bidirectional reset pin with weak pull-up resistor.
26 PC0 bidirectional 5 V-tolerant I/O (FT) with DFSDM1_CKIN0, DFSDM1_DATIN4, SAI2_FS_B, OTG_HS_ULPI_STP, FMC_SDNWE, LCD_R5 and EVENTOUT alternate functions and ADC1/2/3_IN10 analog inputs.
27 PC1 bidirectional 5 V-tolerant I/O (FT) with TRACED0, DFSDM1_DATIN0, SPI2_MOSI/I2S2_SD, SAI1_SD_A, DFSDM1_CKIN4, ETH_MDC, MDIOS_MDC and EVENTOUT alternate functions and ADC1/2/3_IN11, RTC_TAMP3/WKUP3 additional functions.
28 PC2 bidirectional 5 V-tolerant I/O (FT) with DFSDM1_CKIN1, SPI2_MISO, DFSDM1_CKOUT, OTG_HS_ULPI_DIR, ETH_MII_TXD2, FMC_SDNE0 and EVENTOUT alternate functions and ADC1/2/3_IN12 analog inputs.
29 PC3 bidirectional 5 V-tolerant I/O (FT) with DFSDM1_DATIN1, SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, FMC_SDCKE0 and EVENTOUT alternate functions and ADC1/2/3_IN13 analog inputs.
30 VDD power_in Digital supply pin (application supply 1.7 V to 3.6 V).
31 VSSA power_in Analog ground supply pin.
32 VREF+ power_in Positive analog reference voltage input for the ADCs and DACs.
33 VDDA power_in Analog supply pin (1.7 V to 3.6 V application supply range).
34 PA0-WKUP bidirectional 5 V-tolerant I/O (FT) with TIM2_CH1/ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, SAI2_SD_B, ETH_MII_CRS and EVENTOUT alternate functions, ADC1/2/3_IN0 and WKUP1; used as internal reset (active low) in regulator OFF/internal reset ON mode.
35 PA1 bidirectional 5 V-tolerant I/O (FT) with TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3, SAI2_MCLK_B, ETH_MII_RX_CLK/ETH_RMII_REF_CLK, LCD_R2 and EVENTOUT alternate functions and ADC1/2/3_IN1 analog inputs.
36 PA2 bidirectional 5 V-tolerant I/O (FT) with TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, SAI2_SCK_B, ETH_MDIO, MDIOS_MDIO, LCD_R1 and EVENTOUT alternate functions, ADC1/2/3_IN2 and WKUP2.
37 PA3 bidirectional 5 V-tolerant I/O (FT) with TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, LCD_B2, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5 and EVENTOUT alternate functions and ADC1/2/3_IN3 analog inputs.
38 VSS power_in Ground supply pin.
39 VDD power_in Digital supply pin (application supply 1.7 V to 3.6 V).
40 PA4 bidirectional 3.3 V-tolerant I/O directly connected to ADC (TTa) with SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, USART2_CK, SPI6_NSS, OTG_HS_SOF, DCMI_HSYNC, LCD_VSYNC and EVENTOUT alternate functions, ADC1/2_IN4 and DAC_OUT1.
41 PA5 bidirectional 3.3 V-tolerant I/O directly connected to ADC (TTa) with TIM2_CH1/ETR, TIM8_CH1N, SPI1_SCK/I2S1_CK, SPI6_SCK, OTG_HS_ULPI_CK, LCD_R4 and EVENTOUT alternate functions, ADC1/2_IN5 and DAC_OUT2.
42 PA6 bidirectional 5 V-tolerant I/O (FT) with TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, SPI6_MISO, TIM13_CH1, MDIOS_MDC, DCMI_PIXCLK, LCD_G2 and EVENTOUT alternate functions and ADC1/2_IN6 analog inputs.
43 PA7 bidirectional 5 V-tolerant I/O (FT) with TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI/I2S1_SD, SPI6_MOSI, TIM14_CH1, ETH_MII_RX_DV/ETH_RMII_CRS_DV, FMC_SDNWE and EVENTOUT alternate functions and ADC1/2_IN7 analog inputs.
44 PC4 bidirectional 5 V-tolerant I/O (FT) with DFSDM1_CKIN2, I2S1_MCK, SPDIF_RX2, ETH_MII_RXD0/ETH_RMII_RXD0, FMC_SDNE0 and EVENTOUT alternate functions and ADC1/2_IN14 analog inputs.
45 PC5 bidirectional 5 V-tolerant I/O (FT) with DFSDM1_DATIN2, SPDIF_RX3, ETH_MII_RXD1/ETH_RMII_RXD1, FMC_SDCKE0 and EVENTOUT alternate functions and ADC1/2_IN15 analog inputs.
46 PB0 bidirectional 5 V-tolerant I/O (FT) with TIM1_CH2N, TIM3_CH3, TIM8_CH2N, DFSDM1_CKOUT, UART4_CTS, LCD_R3, OTG_HS_ULPI_D1, ETH_MII_RXD2, LCD_G1 and EVENTOUT alternate functions and ADC1/2_IN8 analog inputs.
47 PB1 bidirectional 5 V-tolerant I/O (FT) with TIM1_CH3N, TIM3_CH4, TIM8_CH3N, DFSDM1_DATIN1, LCD_R6, OTG_HS_ULPI_D2, ETH_MII_RXD3, LCD_G0 and EVENTOUT alternate functions and ADC1/2_IN9 analog inputs.
48 PB2 bidirectional 5 V-tolerant I/O (FT) with SAI1_SD_A, SPI3_MOSI/I2S3_SD, QUADSPI_CLK, DFSDM1_CKIN1 and EVENTOUT alternate functions.
49 PF11 bidirectional 5 V-tolerant I/O (FT) with SPI5_MOSI, SAI2_SD_B, FMC_SDNRAS, DCMI_D12 and EVENTOUT alternate functions.
50 PF12 bidirectional 5 V-tolerant I/O (FT) with FMC_A6 and EVENTOUT alternate functions.
51 VSS power_in Ground supply pin.
52 VDD power_in Digital supply pin (application supply 1.7 V to 3.6 V).
53 PF13 bidirectional 5 V-tolerant I/O (FT) with I2C4_SMBA, DFSDM1_DATIN6, FMC_A7 and EVENTOUT alternate functions.
54 PF14 bidirectional 5 V-tolerant I/O (FT) with I2C4_SCL, DFSDM1_CKIN6, FMC_A8 and EVENTOUT alternate functions.
55 PF15 bidirectional 5 V-tolerant I/O (FT) with I2C4_SDA, FMC_A9 and EVENTOUT alternate functions.
56 PG0 bidirectional 5 V-tolerant I/O (FT) with FMC_A10 and EVENTOUT alternate functions.
57 PG1 bidirectional 5 V-tolerant I/O (FT) with FMC_A11 and EVENTOUT alternate functions.
58 PE7 bidirectional 5 V-tolerant I/O (FT) with TIM1_ETR, DFSDM1_DATIN2, UART7_RX, QUADSPI_BK2_IO0, FMC_D4 and EVENTOUT alternate functions.
59 PE8 bidirectional 5 V-tolerant I/O (FT) with TIM1_CH1N, DFSDM1_CKIN2, UART7_TX, QUADSPI_BK2_IO1, FMC_D5 and EVENTOUT alternate functions.
60 PE9 bidirectional 5 V-tolerant I/O (FT) with TIM1_CH1, DFSDM1_CKOUT, UART7_RTS, QUADSPI_BK2_IO2, FMC_D6 and EVENTOUT alternate functions.
61 VSS power_in Ground supply pin.
62 VDD power_in Digital supply pin (application supply 1.7 V to 3.6 V).
63 PE10 bidirectional 5 V-tolerant I/O (FT) with TIM1_CH2N, DFSDM1_DATIN4, UART7_CTS, QUADSPI_BK2_IO3, FMC_D7 and EVENTOUT alternate functions.
64 PE11 bidirectional 5 V-tolerant I/O (FT) with TIM1_CH2, SPI4_NSS, DFSDM1_CKIN4, SAI2_SD_B, FMC_D8, LCD_G3 and EVENTOUT alternate functions.
65 PE12 bidirectional 5 V-tolerant I/O (FT) with TIM1_CH3N, SPI4_SCK, DFSDM1_DATIN5, SAI2_SCK_B, FMC_D9, LCD_B4 and EVENTOUT alternate functions.
66 PE13 bidirectional 5 V-tolerant I/O (FT) with TIM1_CH3, SPI4_MISO, DFSDM1_CKIN5, SAI2_FS_B, FMC_D10, LCD_DE and EVENTOUT alternate functions.
67 PE14 bidirectional 5 V-tolerant I/O (FT) with TIM1_CH4, SPI4_MOSI, SAI2_MCLK_B, FMC_D11, LCD_CLK and EVENTOUT alternate functions.
68 PE15 bidirectional 5 V-tolerant I/O (FT) with TIM1_BKIN, FMC_D12, LCD_R7 and EVENTOUT alternate functions.
69 PB10 bidirectional 5 V-tolerant I/O (FT) with TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, DFSDM1_DATIN7, USART3_TX, QUADSPI_BK1_NCS, OTG_HS_ULPI_D3, ETH_MII_RX_ER, LCD_G4 and EVENTOUT alternate functions.
70 PB11 bidirectional 5 V-tolerant I/O (FT) with TIM2_CH4, I2C2_SDA, DFSDM1_CKIN7, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN/ETH_RMII_TX_EN, DSI_TE, LCD_G5 and EVENTOUT alternate functions.
71 VCAP_1 passive Supply pin for connecting the external capacitor of the internal 1.2 V voltage regulator.
72 VDD power_in Digital supply pin (application supply 1.7 V to 3.6 V).
73 PB12 bidirectional 5 V-tolerant I/O (FT) with TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, DFSDM1_DATIN1, USART3_CK, UART5_RX, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0, OTG_HS_ID and EVENTOUT alternate functions.
74 PB13 bidirectional 5 V-tolerant I/O (FT) with TIM1_CH1N, SPI2_SCK/I2S2_CK, DFSDM1_CKIN1, USART3_CTS, UART5_TX, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1/ETH_RMII_TXD1 and EVENTOUT alternate functions, plus OTG_HS_VBUS.
75 PB14 bidirectional 5 V-tolerant I/O (FT) with TIM1_CH2N, TIM8_CH2N, USART1_TX, SPI2_MISO, DFSDM1_DATIN2, USART3_RTS, UART4_RTS, TIM12_CH1, SDMMC2_D0, OTG_HS_DM and EVENTOUT alternate functions.
76 PB15 bidirectional 5 V-tolerant I/O (FT) with RTC_REFIN, TIM1_CH3N, TIM8_CH3N, USART1_RX, SPI2_MOSI/I2S2_SD, DFSDM1_CKIN2, UART4_CTS, TIM12_CH2, SDMMC2_D1, OTG_HS_DP and EVENTOUT alternate functions.
77 PD8 bidirectional 5 V-tolerant I/O (FT) with DFSDM1_CKIN3, USART3_TX, SPDIF_RX1, FMC_D13 and EVENTOUT alternate functions.
78 PD9 bidirectional 5 V-tolerant I/O (FT) with DFSDM1_DATIN3, USART3_RX, FMC_D14 and EVENTOUT alternate functions.
79 PD10 bidirectional 5 V-tolerant I/O (FT) with DFSDM1_CKOUT, USART3_CK, FMC_D15, LCD_B3 and EVENTOUT alternate functions.
80 PD11 bidirectional 5 V-tolerant I/O (FT) with I2C4_SMBA, USART3_CTS, QUADSPI_BK1_IO0, SAI2_SD_A, FMC_A16/FMC_CLE and EVENTOUT alternate functions.
81 PD12 bidirectional 5 V-tolerant I/O (FT) with TIM4_CH1, LPTIM1_IN1, I2C4_SCL, USART3_RTS, QUADSPI_BK1_IO1, SAI2_FS_A, FMC_A17/FMC_ALE and EVENTOUT alternate functions.
82 PD13 bidirectional 5 V-tolerant I/O (FT) with TIM4_CH2, LPTIM1_OUT, I2C4_SDA, QUADSPI_BK1_IO3, SAI2_SCK_A, FMC_A18 and EVENTOUT alternate functions.
83 VSS power_in Ground supply pin.
84 VDD power_in Digital supply pin (application supply 1.7 V to 3.6 V).
85 PD14 bidirectional 5 V-tolerant I/O (FT) with TIM4_CH3, UART8_CTS, FMC_D0 and EVENTOUT alternate functions.
86 PD15 bidirectional 5 V-tolerant I/O (FT) with TIM4_CH4, UART8_RTS, FMC_D1 and EVENTOUT alternate functions.
87 PG2 bidirectional 5 V-tolerant I/O (FT) with FMC_A12 and EVENTOUT alternate functions.
88 PG3 bidirectional 5 V-tolerant I/O (FT) with FMC_A13 and EVENTOUT alternate functions.
89 PG4 bidirectional 5 V-tolerant I/O (FT) with FMC_A14/FMC_BA0 and EVENTOUT alternate functions.
90 PG5 bidirectional 5 V-tolerant I/O (FT) with FMC_A15/FMC_BA1 and EVENTOUT alternate functions.
91 PG6 bidirectional 5 V-tolerant I/O (FT) with FMC_NE3, DCMI_D12, LCD_R7 and EVENTOUT alternate functions.
92 PG7 bidirectional 5 V-tolerant I/O (FT) with SAI1_MCLK_A, USART6_CK, FMC_INT, DCMI_D13, LCD_CLK and EVENTOUT alternate functions.
93 PG8 bidirectional 5 V-tolerant I/O (FT) with SPI6_NSS, SPDIF_RX2, USART6_RTS, ETH_PPS_OUT, FMC_SDCLK, LCD_G7 and EVENTOUT alternate functions.
94 VSS power_in Ground supply pin.
95 VDDUSB power_in Dedicated supply pin for the USB OTG_FS and OTG_HS interfaces.
96 PC6 bidirectional 5 V-tolerant I/O (FT) with TIM3_CH1, TIM8_CH1, I2S2_MCK, DFSDM1_CKIN3, USART6_TX, FMC_NWAIT, SDMMC2_D6, SDMMC1_D6, DCMI_D0, LCD_HSYNC and EVENTOUT alternate functions.
97 PC7 bidirectional 5 V-tolerant I/O (FT) with TIM3_CH2, TIM8_CH2, I2S3_MCK, DFSDM1_DATIN3, USART6_RX, FMC_NE1, SDMMC2_D7, SDMMC1_D7, DCMI_D1, LCD_G6 and EVENTOUT alternate functions.
98 PC8 bidirectional 5 V-tolerant I/O (FT) with TRACED1, TIM3_CH3, TIM8_CH3, UART5_RTS, USART6_CK, FMC_NE2/FMC_NCE, SDMMC1_D0, DCMI_D2 and EVENTOUT alternate functions.
99 PC9 bidirectional 5 V-tolerant I/O (FT) with MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, UART5_CTS, QUADSPI_BK1_IO0, LCD_G3, SDMMC1_D1, DCMI_D3, LCD_B2 and EVENTOUT alternate functions.
100 PA8 bidirectional 5 V-tolerant I/O (FT) with MCO1, TIM1_CH1, TIM8_BKIN2, I2C3_SCL, USART1_CK, OTG_FS_SOF, CAN3_RX, UART7_RX, LCD_B3, LCD_R6 and EVENTOUT alternate functions.
101 PA9 bidirectional 5 V-tolerant I/O (FT) with TIM1_CH2, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX, DCMI_D0, LCD_R5 and EVENTOUT alternate functions, plus OTG_FS_VBUS.
102 PA10 bidirectional 5 V-tolerant I/O (FT) with TIM1_CH3, USART1_RX, LCD_B4, OTG_FS_ID, MDIOS_MDIO, DCMI_D1, LCD_B1 and EVENTOUT alternate functions.
103 PA11 bidirectional 5 V-tolerant I/O (FT) with TIM1_CH4, SPI2_NSS/I2S2_WS, UART4_RX, USART1_CTS, CAN1_RX, OTG_FS_DM, LCD_R4 and EVENTOUT alternate functions.
104 PA12 bidirectional 5 V-tolerant I/O (FT) with TIM1_ETR, SPI2_SCK/I2S2_CK, UART4_TX, USART1_RTS, SAI2_FS_B, CAN1_TX, OTG_FS_DP, LCD_R5 and EVENTOUT alternate functions.
105 PA13(JTMS-SWDIO) bidirectional 5 V-tolerant I/O (FT) that is JTMS-SWDIO after reset, with EVENTOUT alternate function.
106 VCAP_2 passive Supply pin for connecting the external capacitor of the internal 1.2 V voltage regulator.
107 VSS power_in Ground supply pin.
108 VDD power_in Digital supply pin (application supply 1.7 V to 3.6 V).
109 PA14(JTCK-SWCLK) bidirectional 5 V-tolerant I/O (FT) that is JTCK-SWCLK after reset, with EVENTOUT alternate function.
110 PA15(JTDI) bidirectional 5 V-tolerant I/O (FT) that is JTDI after reset, with TIM2_CH1/ETR, HDMI_CEC, SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, SPI6_NSS, UART4_RTS, CAN3_TX, UART7_TX and EVENTOUT alternate functions.
111 PC10 bidirectional 5 V-tolerant I/O (FT) with DFSDM1_CKIN5, SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDMMC1_D2, DCMI_D8, LCD_R2 and EVENTOUT alternate functions.
112 PC11 bidirectional 5 V-tolerant I/O (FT) with DFSDM1_DATIN5, SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDMMC1_D3, DCMI_D4 and EVENTOUT alternate functions.
113 PC12 bidirectional 5 V-tolerant I/O (FT) with TRACED3, SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, SDMMC1_CK, DCMI_D9 and EVENTOUT alternate functions.
114 PD0 bidirectional 5 V-tolerant I/O (FT) with DFSDM1_CKIN6, DFSDM1_DATIN7, UART4_RX, CAN1_RX, FMC_D2 and EVENTOUT alternate functions.
115 PD1 bidirectional 5 V-tolerant I/O (FT) with DFSDM1_DATIN6, DFSDM1_CKIN7, UART4_TX, CAN1_TX, FMC_D3 and EVENTOUT alternate functions.
116 PD2 bidirectional 5 V-tolerant I/O (FT) with TRACED2, TIM3_ETR, UART5_RX, SDMMC1_CMD, DCMI_D11 and EVENTOUT alternate functions.
117 PD3 bidirectional 5 V-tolerant I/O (FT) with DFSDM1_CKOUT, SPI2_SCK/I2S2_CK, DFSDM1_DATIN0, USART2_CTS, FMC_CLK, DCMI_D5, LCD_G7 and EVENTOUT alternate functions.
118 PD4 bidirectional 5 V-tolerant I/O (FT) with DFSDM1_CKIN0, USART2_RTS, FMC_NOE and EVENTOUT alternate functions.
119 PD5 bidirectional 5 V-tolerant I/O (FT) with USART2_TX, FMC_NWE and EVENTOUT alternate functions.
120 VSS power_in Ground supply pin.
121 VDDSDMMC power_in Dedicated supply pin for SDMMC2 (clock, command and 4-bit data).
122 PD6 bidirectional 5 V-tolerant I/O (FT) with DFSDM1_CKIN4, SPI3_MOSI/I2S3_SD, SAI1_SD_A, USART2_RX, DFSDM1_DATIN1, SDMMC2_CK, FMC_NWAIT, DCMI_D10, LCD_B2 and EVENTOUT alternate functions.
123 PD7 bidirectional 5 V-tolerant I/O (FT) with DFSDM1_DATIN4, SPI1_MOSI/I2S1_SD, DFSDM1_CKIN1, USART2_CK, SPDIF_RX0, SDMMC2_CMD, FMC_NE1 and EVENTOUT alternate functions.
124 PG9 bidirectional 5 V-tolerant I/O (FT) with SPI1_MISO, SPDIF_RX3, USART6_RX, QUADSPI_BK2_IO2, SAI2_FS_B, SDMMC2_D0, FMC_NE2/FMC_NCE, DCMI_VSYNC and EVENTOUT alternate functions.
125 PG10 bidirectional 5 V-tolerant I/O (FT) with SPI1_NSS/I2S1_WS, LCD_G3, SAI2_SD_B, SDMMC2_D1, FMC_NE3, DCMI_D2, LCD_B2 and EVENTOUT alternate functions.
126 PG11 bidirectional 5 V-tolerant I/O (FT) with SPI1_SCK/I2S1_CK, SPDIF_RX0, SDMMC2_D2, ETH_MII_TX_EN/ETH_RMII_TX_EN, DCMI_D3, LCD_B3 and EVENTOUT alternate functions.
127 PG12 bidirectional 5 V-tolerant I/O (FT) with LPTIM1_IN1, SPI6_MISO, SPDIF_RX1, USART6_RTS, LCD_B4, SDMMC2_D3, FMC_NE4, LCD_B1 and EVENTOUT alternate functions.
128 PG13 bidirectional 5 V-tolerant I/O (FT) with TRACED0, LPTIM1_OUT, SPI6_SCK, USART6_CTS, ETH_MII_TXD0/ETH_RMII_TXD0, FMC_A24, LCD_R0 and EVENTOUT alternate functions.
129 PG14 bidirectional 5 V-tolerant I/O (FT) with TRACED1, LPTIM1_ETR, SPI6_MOSI, USART6_TX, QUADSPI_BK2_IO3, ETH_MII_TXD1/ETH_RMII_TXD1, FMC_A25, LCD_B0 and EVENTOUT alternate functions.
130 VSS power_in Ground supply pin.
131 VDD power_in Digital supply pin (application supply 1.7 V to 3.6 V).
132 PG15 bidirectional 5 V-tolerant I/O (FT) with USART6_CTS, FMC_SDNCAS, DCMI_D13 and EVENTOUT alternate functions.
133 PB3(JTDO/TRACESWO) bidirectional 5 V-tolerant I/O (FT) that is JTDO/TRACESWO after reset, with TIM2_CH2, SPI1_SCK/I2S1_CK, SPI3_SCK/I2S3_CK, SPI6_SCK, SDMMC2_D2, CAN3_RX, UART7_RX and EVENTOUT alternate functions.
134 PB4(NJTRST) bidirectional 5 V-tolerant I/O (FT) that is NJTRST after reset, with TIM3_CH1, SPI1_MISO, SPI3_MISO, SPI2_NSS/I2S2_WS, SPI6_MISO, SDMMC2_D3, CAN3_TX, UART7_TX and EVENTOUT alternate functions.
135 PB5 bidirectional 5 V-tolerant I/O (FT) with UART5_RX, TIM3_CH2, I2C1_SMBA, SPI1_MOSI/I2S1_SD, SPI3_MOSI/I2S3_SD, SPI6_MOSI, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1, DCMI_D10, LCD_G7 and EVENTOUT alternate functions.
136 PB6 bidirectional 5 V-tolerant I/O (FT) with UART5_TX, TIM4_CH1, HDMI_CEC, I2C1_SCL, DFSDM1_DATIN5, USART1_TX, CAN2_TX, QUADSPI_BK1_NCS, I2C4_SCL, FMC_SDNE1, DCMI_D5 and EVENTOUT alternate functions.
137 PB7 bidirectional 5 V-tolerant I/O (FT) with TIM4_CH2, I2C1_SDA, DFSDM1_CKIN5, USART1_RX, I2C4_SDA, FMC_NL, DCMI_VSYNC and EVENTOUT alternate functions.
138 BOOT0 input Dedicated boot mode selection pin, also VPP additional function.
139 PB8 bidirectional 5 V-tolerant I/O (FT) with I2C4_SCL, TIM4_CH3, TIM10_CH1, I2C1_SCL, DFSDM1_CKIN7, UART5_RX, CAN1_RX, SDMMC2_D4, ETH_MII_TXD3, SDMMC1_D4, DCMI_D6, LCD_B6 and EVENTOUT alternate functions.
140 PB9 bidirectional 5 V-tolerant I/O (FT) with I2C4_SDA, TIM4_CH4, TIM11_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, DFSDM1_DATIN7, UART5_TX, CAN1_TX, SDMMC2_D5, I2C4_SMBA, SDMMC1_D5, DCMI_D7, LCD_B7 and EVENTOUT alternate functions.
141 PE0 bidirectional 5 V-tolerant I/O (FT) with TIM4_ETR, LPTIM1_ETR, UART8_RX, SAI2_MCLK_A, FMC_NBL0, DCMI_D2 and EVENTOUT alternate functions.
142 PE1 bidirectional 5 V-tolerant I/O (FT) with LPTIM1_IN2, UART8_TX, FMC_NBL1, DCMI_D3 and EVENTOUT alternate functions.
143 PDR_ON input Power-down reset control pin; tied to VDD for internal reset ON and to VSS for internal reset OFF on LQFP144.
144 VDD power_in Digital supply pin (application supply 1.7 V to 3.6 V).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-144(20x20)
Category Embedded Processors & Controllers
Pins 144

CAD (KiCad official)

  • Symbol: STM32F767ZIT6
  • Footprint: Package_QFP:LQFP-144_20x20mm_P0.5mm
  • 3D model: LQFP-144(20x20) (KiCad packages3D, STEP)
  • 3D model files: stm32f767zit6-etched.step / stm32f767zit6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f767zit6.step / stm32f767zit6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (255 pp, sha256 0520a27f9487edf9, retrieved 2026-10-01, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF