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TLC3548CDWR

Public Made by Adom

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Texas Instruments Analog To Digital Converters (ADC), SOIC-24-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

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TLC3548CDWR

Texas Instruments · Analog To Digital Converters (ADC) · SOIC-24-300mil

TLC3548CDWR from Texas Instruments, in a SOIC-24-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SCLK input Serial clock input that clocks SDI in and SDO out, and can serve as the conversion clock when the external clock is selected; it is enabled for data transfer only while CS is low.
2 FS input Frame sync input from the DSP that marks the start of a serial data frame; it must be tied to DVDD if not used.
3 SDI input Serial data input that carries the 4-bit command and, for WRITE CFR, 12 bits of configuration data latched on SCLK falling edges; it must be tied to DVDD for hardware default mode.
4 EOC/INT output End-of-conversion output (EOC, one-shot mode 00 only) or interrupt output to the host (INT), where a falling edge indicates data is ready and INT is cleared by CS↓, FS↑, or CSTART↓.
5 SDO tri_state 3-state serial data output that shifts out the conversion result MSB first and is in high-impedance state when CS is high.
6 DGND power_in Digital ground return for the internal digital circuitry.
7 DVDD power_in Digital supply voltage, operating from a 3-V to 5-V digital supply.
8 CS input Chip select: when high, SDO is high-impedance, SDI is ignored, and SCLK is disabled for data transfer; its falling edge resets the 4-bit counter and enables SDI, SCLK, and SDO.
9 A0 input Analog signal input channel 0, internally multiplexed, with a driving source impedance of 1 kΩ or less recommended for normal sampling.
10 A1 input Analog signal input channel 1, internally multiplexed, with a driving source impedance of 1 kΩ or less recommended for normal sampling.
11 A2 input Analog signal input channel 2, internally multiplexed, with a driving source impedance of 1 kΩ or less recommended for normal sampling.
12 A3 input Analog signal input channel 3, internally multiplexed, with a driving source impedance of 1 kΩ or less recommended for normal sampling.
13 A4 input Analog signal input channel 4 (TLC3548 only), internally multiplexed, with a driving source impedance of 1 kΩ or less recommended for normal sampling.
14 A5 input Analog signal input channel 5 (TLC3548 only), internally multiplexed, with a driving source impedance of 1 kΩ or less recommended for normal sampling.
15 A6 input Analog signal input channel 6 (TLC3548 only), internally multiplexed, with a driving source impedance of 1 kΩ or less recommended for normal sampling.
16 A7 input Analog signal input channel 7 (TLC3548 only), internally multiplexed, with a driving source impedance of 1 kΩ or less recommended for normal sampling.
17 AVDD power_in Analog supply voltage; the device operates from a single 5-V analog supply.
18 AGND power_in Analog ground return for the internal circuitry, with all analog voltage measurements referenced to AGND.
19 REFP input External positive reference input, which can be 3 V to 5 V and must be decoupled with 10 µF in parallel with 0.1 µF to REFM.
20 REFM input External low reference input that must be connected to AGND.
21 BGAP passive Internal bandgap compensation pin, with 0.1 µF to AGND for an external reference or 10 µF in parallel with 0.1 µF to AGND for the internal reference.
22 AGND power_in Analog ground return for the internal circuitry, with all analog voltage measurements referenced to AGND.
23 AVDD power_in Analog supply voltage; the device operates from a single 5-V analog supply.
24 CSTART input External sampling trigger in extended sampling mode, where a high-to-low edge starts sampling and a low-to-high edge starts conversion; the first CSTART cannot occur before the rising edge of the 11th SCLK, and it must be tied to DVDD if not used.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-24-300mil
Category Data Acquisition
Pins 24

CAD (KiCad official)

  • Symbol: TLC3548CDWR
  • Footprint: Package_SO:SOIC-24W_7.5x15.4mm_P1.27mm
  • 3D model: SOIC-24-300mil (KiCad packages3D, STEP)
  • 3D model files: tlc3548cdwr-etched.step / tlc3548cdwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc3548cdwr.step / tlc3548cdwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (50 pp, sha256 8b7afcf5259b323c, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF