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Contents

README

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IRFU7440PBF

Infineon Technologies · MOSFETs · IPAK

IRFU7440PBF from Infineon Technologies, in a IPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate control input of the N-channel MOSFET, rated for a maximum gate-to-source voltage of ±20 V.
2 D passive Drain terminal, rated for 40 V minimum drain-to-source breakdown voltage (VDSS) and 180 A silicon-limited (90 A package-limited) continuous current, and connected to the mounting tab.
3 S passive Source terminal, carrying up to 90 A continuous current (wire-bond limited) and the body-diode current of up to 180 A.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package IPAK
Category Transistors
Pins 3

CAD (KiCad official)

  • Symbol: IRFU7440PBF
  • Footprint: Package_TO_SOT_THT:TO-251-3_Vertical
  • 3D model: IPAK (KiCad packages3D, STEP)
  • 3D model files: irfu7440pbf-etched.step / irfu7440pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); irfu7440pbf.step / irfu7440pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (13 pp, sha256 cb13e27f420c3cfd, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF