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Contents

README

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SN74AUC2G08DCUR

Texas Instruments · Logic Gates · VSSOP-8

SN74AUC2G08DCUR from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Input A to AND gate 1; accepts logic levels from 0 to 3.6 V
2 1B input Input B to AND gate 1; accepts logic levels from 0 to 3.6 V
3 2Y output Output of AND gate 2 (2A AND 2B); drives 0 to VCC with ±8 mA output current at 1.8 V
4 GND power_in Ground reference and return path for supply current
5 2A input Input A to AND gate 2; accepts logic levels from 0 to 3.6 V
6 2B input Input B to AND gate 2; accepts logic levels from 0 to 3.6 V
7 1Y output Output of AND gate 1 (1A AND 1B); drives 0 to VCC with ±8 mA output current at 1.8 V
8 VCC power_in Positive supply voltage, operating range 0.8 to 2.7 V

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VSSOP-8
Category Logic
Pins 8

CAD (KiCad official)

  • Symbol: SN74AUC2G08DCUR
  • Footprint: Package_SO:VSSOP-8_2.3x2mm_P0.5mm
  • 3D model: VSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: sn74auc2g08dcur-etched.step / sn74auc2g08dcur-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74auc2g08dcur.step / sn74auc2g08dcur.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (19 pp, sha256 94b76286c8ba0ffa, retrieved 2026-09-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF