6PAIC3104TRHBRQ1 from Texas Instruments, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	MCLK	input	Master clock input.
2	BCLK	bidirectional	Audio serial data bus bit clock input/output.
3	WCLK	bidirectional	Audio serial data bus word clock input/output.
4	DIN	input	Audio serial data bus data input.
5	DOUT	output	Audio serial data bus data output.
6	DVSS	power_in	Digital core / I/O ground supply, 0 V.
7	IOVDD	power_in	Digital I/O voltage supply, 1.1 V to 3.6 V.
8	SCL	bidirectional	I2C serial clock input.
9	SDA	bidirectional	I2C serial data input/output.
10	MIC1LP/LINE1LP	input	Left input 1 (single-ended) or left input + (differential).
11	MIC1LM/LINE1LM	input	Left input - (differential only).
12	MIC1RP/LINE1RP	input	Right input 1 (single-ended) or right input + (differential).
13	MIC1RM/LINE1RM	input	Right input - (differential only).
14	MIC2L/LINE2L/MICDET	input	Left input 2 (single-ended); can support microphone detection.
15	MICBIAS	output	Microphone bias voltage output.
16	MIC2R/LINE2R	input	Right input 2 (single-ended).
17	AVSS1	power_in	Analog ADC ground supply, 0 V.
18	DRVDD	power_in	Analog ADC and output driver voltage supply, 2.7 V to 3.6 V.
19	HPLOUT	output	High-power output driver (left +).
20	HPLCOM	output	High-power output driver (left -, or multifunctional).
21	DRVSS	power_in	Analog output driver ground supply, 0 V.
22	HPRCOM	output	High-power output driver (right -, or multifunctional).
23	HPROUT	output	High-power output driver (right +).
24	DRVDD	power_in	Analog output driver voltage supply, 2.7 V to 3.6 V.
25	AVDD	power_in	Analog DAC voltage supply, 2.7 V to 3.6 V.
26	AVSS2	power_in	Analog DAC ground supply, 0 V.
27	LEFT_LOP	output	Left line output (+).
28	LEFT_LOM	output	Left line output (-).
29	RIGHT_LOP	output	Right line output (+).
30	RIGHT_LOM	output	Right line output (-).
31	RESET	input	Reset input.
32	DVDD	power_in	Digital core voltage supply, 1.525 V to 1.95 V.
33	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VQFN-32(5x5)
Category	Interface
Pins	33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Analog supply voltage	AVDD, DRVDD	2.7	3.3	3.6	V		7
Digital core supply voltage	DVDD	1.525	1.8	1.95	V		7
Digital I/O supply voltage	IOVDD	1.1	1.8	3.6	V		7
Operating free-air temperature	TA	-40		105	°C		7
Stereo line output load resistance		10			kΩ		7
Stereo headphone output load resistance		16			Ω		7
Digital output load capacitance			10		pF		7
AVDD/DRVDD to AVSS/DRVSS		-0.3		3.9	V		6
IOVDD to DVSS		-0.3		3.9	V		6
DVDD to DVSS		-0.3		2.5	V		6
AVDD to DRVDD		-0.1		0.1	V		6
Junction temperature	TJ			105	°C		6
Operating temperature range		-40		105	°C		6
Storage temperature	Tstg	-40		105	°C		6
Junction-to-ambient thermal resistance	RθJA		32.3		°C/W	RHB (VQFN) 32 pins	7
Junction-to-case (top) thermal resistance	RθJC(top)		17		°C/W		7
Junction-to-board thermal resistance	RθJB		6		°C/W		7
Junction-to-case (bottom) thermal resistance	RθJC(bot)		1.8		°C/W		7
ADC signal-to-noise ratio	SNR	80	92		dB	A-weighted, fS = 48 kSPS, 0-dB PGA gain, inputs ac-shorted to ground	8
ADC total harmonic distortion	THD		-89	-75	dB	fS = 48 kSPS; 0-dB PGA gain; 1-kHz, -2-dB, full-scale input signal	8
Microphone bias voltage		2.3	2.455	2.7	V	Programmable setting = 2.5 V	9
DAC differential line output SNR		90	102		dB	A-weighted, fS = 48 kHz, output volume control = 0 dB, no input signal, referenced to full-scale input level	9
DAC differential line output THD			-95	-75	dB	fS = 48 kHz; 0-dB, 1-kHz input full-scale signal; output volume control = 0 dB; output common-mode setting = 1.35 V	9
Headphone single-ended THD	THD		-71	-65	dB	fS = 48 kHz, 0-dB input full-scale signal, output volume control = 0 dB, output common-mode setting = 1.35 V	10
Input low level	VIL	-0.3		0.3	V	max is 0.3 × IOVDD	11
Input high level	VIH	1.1			V	IOVDD ≤ 1.6 V	11
Output low level	VOL			0.1	V	max is 0.1 × IOVDD	11
Output high level	VOH	0.8			V	min is 0.8 × IOVDD	11
HBM ESD	V(ESD)	-2000		2000	V	Human-body model, AEC Q100-002	6
CDM ESD	V(ESD)	-1000		1000	V	AEC Q100-011	6

CAD (KiCad official)

Symbol: 6PAIC3104TRHBRQ1
Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
3D model files: 6paic3104trhbrq1-etched.step / 6paic3104trhbrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 6paic3104trhbrq1.step / 6paic3104trhbrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (102 pp, sha256 322cb3352da88978, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

6PAIC3104TRHBRQ1

Verified 6PAIC3104TRHBRQ1

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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