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Contents

README

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S-LBAW56LT1G

LRC · Switching Diodes · SOT-23

S-LBAW56LT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CATHODE passive Cathode of one of the two monolithic switching diodes; the device maximum reverse voltage is 70 V and maximum forward current is 200 mA.
2 CATHODE passive Cathode of the other monolithic switching diode; the device maximum reverse voltage is 70 V and maximum forward current is 200 mA.
3 ANODE passive Anode shared by the two switching diodes in the dual-diode package; the device maximum reverse voltage is 70 V and maximum forward current is 200 mA.

Key specifications

Parameter Value
Manufacturer LRC
Package SOT-23
Category Diodes
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Reverse Breakdown Voltage VBR 70 V I(BR) = 100μA 2
Forward Voltage VF 715 mV IF = 1.0 mA 2
Forward Voltage VF 855 mV IF = 10 mA 2
Forward Voltage VF 1000 mV IF = 50 mA 2
Forward Voltage VF 1250 mV IF = 150 mA 2
Reverse Voltage Leakage Current IR 2.5 μA VR = 70 V 2
Reverse Voltage Leakage Current IR 50 μA VR = 70 V, TJ = 150°C 2
Reverse Voltage Leakage Current IR 30 μA VR = 25 V, TJ = 150°C 2
Diode Capacitance CD 2 pF VR = 0 V, f = 1.0 MHz 2
Reverse Recovery Time trr 6 ns IF = IR = 10 mA, IR(REC) = 1.0 mA, RL = 100 Ω 2
Reverse Voltage VR 70 V Ta = 25ºC 1
Forward Current IF 200 mA Ta = 25ºC 1
Peak Forward Surge Current IFM(surge) 500 mA Ta = 25ºC 1
Total Device Dissipation, FR-5 Board (Note 1) @ TA = 25ºC PD 225 mW FR-5 Board (1.0 x 0.75 x 0.062 in.), TA = 25ºC 1
Derate above 25ºC (FR-5 Board) 1.8 mW/ºC Derate above 25ºC 1
Thermal Resistance, Junction-to-Ambient (FR-5 Board) RΘJA 556 ºC/W FR-5 Board (Note 1) 1
Total Device Dissipation, Alumina Substrate (Note 2) @ TA = 25ºC PD 300 mW Alumina Substrate (0.4 x 0.3 x 0.024 in. 99.5% alumina), TA = 25ºC 1
Derate above 25ºC (Alumina Substrate) 2.4 mW/ºC Derate above 25ºC 1
Thermal Resistance, Junction-to-Ambient (Alumina Substrate) RΘJA 417 ºC/W Alumina Substrate (Note 2) 1
Junction and Storage Temperature TJ,Tstg -55 150 ºC 1

CAD (KiCad official)

  • Symbol: S-LBAW56LT1G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: s-lbaw56lt1g-etched.step / s-lbaw56lt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); s-lbaw56lt1g.step / s-lbaw56lt1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (4 pp, sha256 dcae3f6fb568dbdf, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF