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UCC28086PWR
Public Made by Adomby adom
Texas Instruments DC-DC Controllers, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownUCC28086PWR
Texas Instruments · DC-DC Controllers · TSSOP-8
UCC28086PWR from Texas Instruments, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTB | output | Alternating high-current output stage that drives a power MOSFET gate with 0.5-A peak source and 1-A peak sink, switching at half the oscillator frequency. |
| 2 | GND | power_in | Reference ground and power ground for all functions; a low-impedance ground plane is recommended due to high currents and high-frequency operation. |
| 3 | RT | input | Oscillator programming pin; an external resistor to ground (recommended 25 kΩ to 698 kΩ) sets the frequency, with nominal pin voltage of 1.5 V (1.2 V to 1.6 V). |
| 4 | CS | input | Current-sense input to the PWM comparator, cycle-by-cycle peak current comparator and overcurrent comparator (0.75 V typ threshold), with internal discharge MOSFET for the filter capacitor. |
| 5 | ISET | input | Slope compensation current selection; a resistor RSET (minimum 5 kΩ) to ground programs the ramp, with ISLOPE = 5 x ISET. |
| 6 | CTRL | input | Error voltage input to the PWM comparator, typically driven from an opto-coupler, with internal divider ratio of 0.45. |
| 7 | VDD | power_in | Power input connection with 15 V absolute maximum (IDD < 10 mA); bypass to GND with a 1-µF capacitor placed close to the chip. |
| 8 | OUTA | output | Alternating high-current output stage that drives a power MOSFET gate with 0.5-A peak source and 1-A peak sink, switching at half the oscillator frequency. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-8 |
| Category | Power Supply Chip |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Start-up current (VDD < UVLO start threshold) | 120 | 200 | µA | VDD < UVLO start threshold voltage | 3 | ||
| Supply current | 1.5 | 2.5 | mA | CTRL = 0 V, CS = 0 V, See Note 1 | 3 | ||
| Start threshold voltage (UCC38084/6) | 4.1 | 4.3 | 4.5 | V | See Note 1 | 3 | |
| Minimum operating voltage after start (UCC38084/6) | 3.9 | 4.1 | 4.3 | V | 3 | ||
| Hysteresis voltage (UCC38084/6) | 0.1 | 0.2 | 0.3 | V | 3 | ||
| Frequency (2 x f(OUTA)) | 180 | 200 | 220 | kHz | 3 | ||
| Voltage amplitude | 1.4 | 1.5 | 1.6 | V | See Note 2 | 3 | |
| Oscillator fall time (dead time) | 110 | 220 | ns | 3 | |||
| RT pin voltage | 1.2 | 1.5 | 1.6 | V | 3 | ||
| Gain | 1.9 | 2.2 | 2.5 | V/V | See Note 3 | 4 | |
| Maximum input signal voltage | 0.47 | 0.52 | 0.57 | V | CTRL = 5 V, See Note 4 | 4 | |
| CS to output delay time | 100 | 200 | ns | CTRL = 3.5 V, 0 mV ≤ CS ≤ 600 mV | 4 | ||
| Source current | -200 | nA | 4 | ||||
| Sink current | 3 | 7 | 12 | mA | CS = 0.5 V, RT = 2.0 V, See Note 5 | 4 | |
| Overcurrent threshold voltage | 0.7 | 0.75 | 0.8 | V | 4 | ||
| CTRL to CS offset voltage | 0.55 | 0.7 | 0.9 | V | CS = 0 V, 25°C | 4 | |
| CTRL to CS offset voltage | 0.37 | 0.7 | 1.1 | V | CS = 0 V | 4 | |
| Maximum duty cycle | 48 | 49 | 50 | % | Measured at OUTA or OUTB, See Note 7 | 4 | |
| Minimum duty cycle | 0 | % | CTRL = 0 V | 4 | |||
| Low-level output voltage (OUTA or OUTB) | 0.5 | 1 | V | IOUT = 100 mA | 4 | ||
| High-level output voltage (OUTA or OUTB) | 0.5 | 1 | V | IOUT = −50 mA, (VDD − VOUT), See Note 6 | 4 | ||
| Rise time | 25 | 60 | ns | CLOAD = 1 nF | 4 | ||
| Fall time | 25 | 60 | ns | CLOAD = 1 nF | 4 | ||
| OUTA/OUTB soft-start interval time, UCC38085/6 | 30 | 75 | 110 | µs | CTRL = 1.8 V, CS = 0 V, Duty cycle from 0 to full, See Note 8 | 4 | |
| Slope compensation ramp current, peak | IRAMP | 125 | 150 | 175 | µA | ISET, peak = 30 µA, Full duty cycle | 4 |
| Supply voltage, VDD (upper limit printed for IDD < 10 mA) | VDD | 15 | V | IDD < 10 mA | 3 | ||
| Supply current | IDD | 20 | mA | 3 | |||
| Sink current (peak): OUTA | 1 | A | 3 | ||||
| Sink current (peak): OUTB | 1 | A | 3 | ||||
| Source current (peak): OUTA | -0.5 | A | 3 | ||||
| Source current (peak): OUTB | -0.5 | A | 3 | ||||
| Analog input CTRL (upper limit printed as VDD + 0.3 V) | -0.3 | V | 3 | ||||
| Analog input CS (upper limit printed as VDD + 0.3 V) | -0.3 | V | not to exceed 6 V | 3 | |||
| RSET (minimum, printed >5 kΩ) | RSET | 5 | kΩ | minimum resistance | 3 | ||
| RT pin voltage, absolute range | -0.3 | 2 | V | −100 µA < IRT < 100 µA | 3 | ||
| Power dissipation (PW package) | 400 | mW | TA = 25°C | 3 | |||
| Junction operating temperature | TJ | -55 | 150 | °C | 3 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Lead temperature (soldering 10 seconds) | 300 | °C | soldering 10 seconds | 3 | |||
| Thermal resistance junction-to-ambient, TSSOP-8 (PW) | θja | 232 | 257 | °C/W | Note 2: lower value for 3x3 inch, higher for 1x1 inch 1 oz ground plane (modeled) | 2 | |
| Thermal resistance junction-to-case, TSSOP-8 (PW) | θjc | 32 | °C/W | Note 2 (modeled data) | 2 |
CAD (KiCad official)
- Symbol:
UCC28086PWR - Footprint:
Package_SO:TSSOP-8_3x3mm_P0.65mm - 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
ucc28086pwr-etched.step/ucc28086pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ucc28086pwr.step/ucc28086pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (28 pp, sha256
19bab60962d5c6f5, retrieved 2026-10-08, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).