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GD32F350CBT6

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GigaDevice Semicon Beijing Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersgd32f350cbt6factory-2.0.0extractor-text
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Symbol & Footprint

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Datasheet

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Contents

README

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GD32F350CBT6

GigaDevice Semicon Beijing · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

GD32F350CBT6 from GigaDevice Semicon Beijing, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup power supply input, default function VBAT; the pin definition table gives no voltage limits for it.
2 PC13-TAMPER-RTC bidirectional General-purpose I/O PC13 by default, with additional RTC_TAMP0, RTC_TS, RTC_OUT and WKUP1 functions.
3 PC14-OSC32IN bidirectional General-purpose I/O PC14 by default, with additional OSC32IN function for the low-speed 32.768 kHz crystal input.
4 PC15-OSC32OUT bidirectional General-purpose I/O PC15 by default, with additional OSC32OUT function for the low-speed 32.768 kHz crystal output.
5 PF0-OSCIN bidirectional 5 V tolerant I/O PF0 by default, with alternate CTC_SYNC and additional OSCIN high-speed oscillator input function.
6 PF1-OSCOUT bidirectional 5 V tolerant I/O PF1 by default, with additional OSCOUT high-speed oscillator output function.
7 NRST bidirectional Reset pin with default function NRST, listed as I/O in the pin definition table.
8 VSSA power_in Analog ground pin, default function VSSA.
9 VDDA power_in Analog supply pin, default function VDDA; the block diagram shows the DAC powered from VDD/VDDA.
10 PA0-WKUP bidirectional GPIO PA0 with ADC_IN0, CMP0_IM6, RTC_TAMP1 and WKUP0 additional functions, and alternates USART0_CTS, USART1_CTS, TIMER1_CH0, TIMER1_ETI, TSI_G0_IO0, I2C1_SCL and CMP0_OUT.
11 PA1 bidirectional GPIO PA1 with ADC_IN1 and CMP0_IP additional functions, and alternates USART0_RTS, USART1_RTS, TIMER1_CH1, TSI_G0_IO1, I2C1_SDA and EVENTOUT.
12 PA2 bidirectional GPIO PA2 with ADC_IN2 and CMP1_IM6 additional functions, and alternates USART0_TX, USART1_TX, TIMER1_CH2, TIMER14_CH0, CMP1_OUT and TSI_G0_IO2.
13 PA3 bidirectional GPIO PA3 with ADC_IN3 and CMP1_IP additional functions, and alternates USART0_RX, USART1_RX, TIMER1_CH3, TIMER14_CH1 and TSI_G0_IO3.
14 PA4 bidirectional GPIO PA4 with ADC_IN4, CMP0_IM4, CMP1_IM4 and DAC0_OUT additional functions, and alternates SPI0_NSS/I2S0_WS, USART0_CK, USART1_CK, TIMER13_CH0, TSI_G1_IO0 and SPI1_NSS.
15 PA5 bidirectional GPIO PA5 with ADC_IN5, CMP0_IM5 and CMP1_IM5 additional functions, and alternates SPI0_SCK/I2S0_CK, CEC, TIMER1_CH0, TIMER1_ETI and TSI_G1_IO1.
16 PA6 bidirectional GPIO PA6 with ADC_IN6 additional function, and alternates SPI0_MISO/I2S0_MCK, TIMER2_CH0, TIMER0_BKIN, TIMER15_CH0, CMP0_OUT, TSI_G1_IO2 and EVENTOUT.
17 PA7 bidirectional GPIO PA7 with ADC_IN7 additional function, and alternates SPI0_MOSI/I2S0_SD, TIMER2_CH1, TIMER0_CH0_ON, TIMER13_CH0, TIMER16_CH0, CMP1_OUT, TSI_G1_IO3 and EVENTOUT.
18 PB0 bidirectional GPIO PB0 with ADC_IN8 additional function, and alternates TIMER2_CH2, TIMER0_CH1_ON, TSI_G2_IO1, USART1_RX and EVENTOUT.
19 PB1 bidirectional GPIO PB1 with ADC_IN9 additional function, and alternates TIMER2_CH3, TIMER13_CH0, TIMER0_CH2_ON, TSI_G2_IO2 and SPI1_SCK.
20 PB2 bidirectional 5 V tolerant GPIO PB2 with alternate function TSI_G2_IO3.
21 PB10 bidirectional 5 V tolerant GPIO PB10 with alternates I2C0_SCL/I2C1_SCL, CEC, TIMER1_CH2, TSITG and SPI1_IO2.
22 PB11 bidirectional 5 V tolerant GPIO PB11 with alternates I2C0_SDA/I2C1_SDA, TIMER1_CH3, TSI_G5_IO0, EVENTOUT and SPI1_IO3.
23 VSS power_in Ground pin, default function VSS.
24 VDD power_in Digital supply pin, default function VDD; the device operates from a 2.6 to 3.6 V power supply.
25 PB12 bidirectional 5 V tolerant GPIO PB12 with alternates SPI0_NSS/SPI1_NSS, EVENTOUT, TIMER0_BKIN, TSI_G5_IO1 and I2C1_SMBA.
26 PB13 bidirectional 5 V tolerant GPIO PB13 with alternates SPI0_SCK/SPI1_SCK, TIMER0_CH0_ON and TSI_G5_IO2.
27 PB14 bidirectional 5 V tolerant GPIO PB14 with alternates SPI0_MISO/SPI1_MISO, TIMER14_CH0, TIMER0_CH1_ON and TSI_G5_IO3.
28 PB15 bidirectional 5 V tolerant GPIO PB15 with additional RTC_REFIN and WKUP6 functions, and alternates SPI0_MOSI/SPI1_MOSI, TIMER14_CH1, TIMER0_CH2_ON and TIMER14_CH0_ON.
29 PA8 bidirectional 5 V tolerant GPIO PA8 with alternates USART0_CK, TIMER0_CH0, CK_OUT, USART1_TX, EVENTOUT, USBFS_SOF and CTC_SYNC.
30 PA9 bidirectional 5 V tolerant GPIO PA9 with alternates USART0_TX, TIMER0_CH1, TIMER14_BKIN, TSI_G3_IO0, I2C0_SCL and USBFS_VBUS.
31 PA10 bidirectional 5 V tolerant GPIO PA10 with alternates USART0_RX, TIMER0_CH2, TIMER16_BKIN, TSI_G3_IO1, I2C0_SDA and USBFS_ID.
32 PA11 bidirectional 5 V tolerant GPIO PA11 with additional USBFS_DM function, and alternates USART0_CTS, TIMER0_CH3, CMP0_OUT, TSI_G3_IO2, EVENTOUT and SPI1_IO2.
33 PA12 bidirectional 5 V tolerant GPIO PA12 with additional USBFS_DP function, and alternates USART0_RTS, TIMER0_ETI, CMP1_OUT, TSI_G3_IO3, EVENTOUT and SPI1_IO3.
34 PA13 bidirectional 5 V tolerant GPIO PA13 with default SWDIO function, and alternates IFRP_OUT and SPI1_MISO.
35 PF6 bidirectional 5 V tolerant GPIO PF6 with alternates I2C0_SCL and I2C1_SCL.
36 PF7 bidirectional 5 V tolerant GPIO PF7 with alternates I2C0_SDA and I2C1_SDA.
37 PA14 bidirectional 5 V tolerant GPIO PA14 with default SWCLK function, and alternates USART0_TX, USART1_TX and SPI1_MOSI.
38 PA15 bidirectional 5 V tolerant GPIO PA15 with alternates SPI0_NSS/I2S0_WS, USART0_RX, USART1_RX, TIMER1_CH0, TIMER1_ETI, SPI1_NSS and EVENTOUT.
39 PB3 bidirectional 5 V tolerant GPIO PB3 with alternates SPI0_SCK/I2S0_CK, EVENTOUT, TIMER1_CH1 and TSI_G4_IO0.
40 PB4 bidirectional 5 V tolerant GPIO PB4 with alternates SPI0_MISO/I2S0_MCK, TIMER2_CH0, EVENTOUT and TSI_G4_IO1.
41 PB5 bidirectional 5 V tolerant GPIO PB5 with additional WKUP5 function, and alternates SPI0_MOSI/I2S0_SD, I2C0_SMBA, TIMER15_BKIN and TIMER2_CH1.
42 PB6 bidirectional 5 V tolerant GPIO PB6 with alternates I2C0_SCL, USART0_TX, TIMER15_CH0_ON and TSI_G4_IO2.
43 PB7 bidirectional 5 V tolerant GPIO PB7 with alternates I2C0_SDA, USART0_RX, TIMER16_CH0_ON and TSI_G4_IO3.
44 BOOT0 input Boot mode select input with default function BOOT0.
45 PB8 bidirectional 5 V tolerant GPIO PB8 with alternates I2C0_SCL, CEC, TIMER15_CH0 and TSITG.
46 PB9 bidirectional 5 V tolerant GPIO PB9 with alternates I2C0_SDA, IFRP_OUT, TIMER16_CH0, EVENTOUT and I2S0_MCK.
47 VSS power_in Ground pin, default function VSS.
48 VDD power_in Digital supply pin, default function VDD; the device operates from a 2.6 to 3.6 V power supply.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External voltage range (VDD), absolute max VDD -0.3 3.6 V Referenced to VSS; printed as VSS - 0.3 / VSS + 3.6 32
External analog supply voltage (VDDA), absolute max VDDA -0.3 3.6 V Referenced to VSSA; printed as VSSA - 0.3 / VSSA + 3.6 32
External battery supply voltage (VBAT), absolute max VBAT -0.3 3.6 V Referenced to VSS; printed as VSS - 0.3 / VSS + 3.6 32
Input voltage on 5V tolerant pin VIN -0.3 4 V 5V tolerant pin; min printed as VSS - 0.3, max printed as VDD + 4.0 32
Input voltage on other I/O VIN -0.3 4 V Other I/O; min printed as VSS - 0.3 32
Variations between different VDD power pins /ΔVDDx/ 50 mV 32
Variations between different ground pins /VSSX −VSS/ 50 mV 32
Maximum current for GPIO pins IIO 25 mA 32
Operating temperature range TA -40 85 °C 32
Storage temperature range TSTG -55 150 °C 32
Maximum junction temperature TJ 125 °C 32
Supply voltage VDD 2.6 3.3 3.6 V 32
Analog supply voltage VDDA 2.6 3.3 3.6 V Same as VDD 32
Battery supply voltage VBAT 1.8 3.6 V 32
Power on reset threshold VPOR 2.3 2.4 2.48 V 34
Power down reset threshold VPDR 1.72 1.8 1.88 V 34
High speed external clock (HXTAL) frequency fHXTAL 4 8 32 MHz VDD=3.3V 36
Recommended load capacitance on OSC_IN and OSC_OUT CHXTAL 20 30 pF 36
HXTAL oscillator duty cycle DHXTAL 30 50 70 % 36
Recommended load capacitance on OSC32_IN and OSC32_OUT CLXTAL 15 pF 36
LXTAL oscillator duty cycle DLXTAL 30 50 70 % 36
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -4 5 % VDD=3.3V, TA=-40°C ~+105°C 36
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -2 2 % VDD=3.3V, TA=0°C ~ +85°C 36
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -1 1 % VDD=3.3V, TA=25°C 36
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -4 5 % VDD=3.3V, TA=-40°C ~+105°C 37
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -3 3 % VDD=3.3V, TA=0°C ~ +85°C 37
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -2 2 % VDD=3.3V, TA=25°C 37
Low speed internal oscillator (IRC32K) frequency fIRC32K 20 40 45 KHz VDD=VBAT=3.3V, TA=-40°C ~ +85°C 37
PLL input clock frequency fPLLIN 1 25 MHz 37
PLL output clock frequency fPLLOUT 16 108 MHz 37
PLL lock time tLOCK 300 μs 37
Number of guaranteed program/erase cycles before failure (Endurance) PECYC 100 kcycles TA=-40°C ~ +85°C 38
Data retention time tRET 20 years TA=125°C 38
Word programming time tPROG 200 400 us TA=-40°C ~ +85°C 38
Page erase time tERASE 60 100 450 ms TA=-40°C ~ +85°C 38
Standard IO low level input voltage VIL 1.31 V VDD=3.3V 39
High voltage tolerant IO low level input voltage VIL 1.36 V VDD=3.3V 39
Standard IO high level input voltage VIH 1.99 V VDD=3.3V 39
High voltage tolerant IO high level input voltage VIH 1.99 V VDD=3.3V 39
Low level output voltage VOL 0.19 V VDD=3.3V, IIO=8mA 39
Low level output voltage VOL 0.47 V VDD=3.3V, IIO=20mA 39
High level output voltage VOH 3.1 V VDD=3.3V, IIO=8mA 39
High level output voltage VOH 2.73 V VDD=3.3V, IIO=20mA 39
Internal pull-up resistor RPU 30 40 50 kΩ All pins VIN=VSS 39
Internal pull-up resistor RPU 7.5 10 13.5 kΩ PA10 39
Internal pull-down resistor RPD 30 40 50 kΩ All pins VIN=VDD 39
Internal pull-down resistor RPD 7.5 10 13.5 kΩ PA10 39
ADC input voltage range VADCIN 0 V max printed as VREF+ 40
ADC clock fADC 0.1 40 MHz 40
Sampling time ts 0.0375 5.99 μs fADC=40MHz 40
ADC startup time tSU 1 μs 40
External input impedance RAIN 32.9 kΩ See Equation 2 40
Input sampling switch resistance RADC 0.55 kΩ 40
Resistive load RLOAD 5 kΩ Resistive load with buffer ON 42
DC current consumption in quiescent mode with no load IDDA 500 μA Middle code on the input 42
Settling time TSETTLING 0.3 0.5 μs CLOAD≤50pF, RLOAD≥5kΩ 42
Lower DAC_OUT voltage DAC_OUTmin 0.2 V Lower DAC_OUT voltage with buffer ON 42
SCL clock frequency fSCL 0 100 KHz Standard mode 44
SCL clock frequency fSCL 0 1000 KHz Fast mode 44
SCK clock frequency fSCK 30 MHz 44

CAD (KiCad official)

  • Symbol: GD32F350CBT6
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: gd32f350cbt6-etched.step / gd32f350cbt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32f350cbt6.step / gd32f350cbt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (50 pp, sha256 afbad49cb5ce969a, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF