TLV62569PDDCR from Texas Instruments, in a SOT-23-THIN-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	EN	input	Device enable logic input. Logic high enables the converter; logic low disables the device and puts it into shutdown. Do not leave floating. VIH ≥ 0.95 V (typ), VIL ≤ 0.85 V (typ), absolute max 6 V.
2	GND	power_in	Ground pin. Reference for all voltages; also serves as return for the internal low-side FET.
3	SW	power_out	Switch pin connected to the internal high-side and low-side FET switches and the inductor terminal. Connect the inductor of the output filter to this pin. DC range −0.3 V to VIN+0.3 V; AC (<10 ns) −3.0 V to 9 V.
4	VIN	power_in	Power supply voltage input. Operating range 2.5 V to 5.5 V; absolute max 6 V. Bypass locally to GND with a low-ESR ceramic capacitor.
5	PG	output	Power Good open-drain output (TLV62569P only). Asserts high (via external pull-up) when VFB is within regulation. External pull-up must not exceed 5.5 V; IPG sink capability 1 mA at VPG,OL ≤ 0.4 V. Leave floating if unused.
6	FB	input	Feedback pin for the internal control loop. Connect to the mid-point of an external resistor divider from VOUT to GND. Regulation target VFB = 0.6 V (typ, 0.588-0.612 V).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOT-23-THIN-6
Category	PMIC
Pins	6

Ordering variants

Same part, different packaging or reel option.

TLV62569PDDCR
TLV62569PDDCT
TLV62569PDDCRDBV
TLV62569PDDCRDBVR
TLV62569PDDCRDBVT
TLV62569PDDCRDRLR
TLV62569PDDCRPDRLR

CAD (KiCad official)

Symbol: TLV62569PDDCR
Footprint: Package_TO_SOT_SMD:SOT-23
3D model: SOT-23-THIN-6 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`tlv62569pddcr.step`	97 KB	You want the bare part, or you mark your own boards.
`tlv62569pddcr-etched.step`	2.4 MB	You want the part with `TLV62569PDDCR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 578 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (27 pp, sha256 2fb0ac3bf691ff6e, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF