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README

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SN74AUP1G02DCKR

Texas Instruments · Logic Gates · SC-70-5

SN74AUP1G02DCKR from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Input A of the 2-input positive-NOR gate, stated by the datasheet as 3.6-V I/O tolerant.
2 B input Input B of the 2-input positive-NOR gate, stated by the datasheet as 3.6-V I/O tolerant.
3 GND power_in Ground reference pin for the device.
4 Y output Output Y of the NOR gate, performing Y = A + B in positive logic.
5 VCC power_in Power supply pin; the device operates over a VCC range of 0.8 V to 3.6 V per the Features list.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SC-70-5
Category Logic
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 4.6 V 4
Input voltage VI -0.5 4.6 V 4
Voltage range applied to any output in the high-impedance or power-off state VO -0.5 4.6 V 4
Input clamp current IIK -50 mA VI < 0 4
Output clamp current IOK -50 mA VO < 0 4
Continuous output current IO -20 20 mA 4
Continuous current through VCC or GND -50 50 mA 4
Storage temperature Tstg -65 150 °C 4
Supply voltage VCC 0.8 3.6 V 5
High-level input voltage VIH 1.6 V VCC = 2.3 V to 2.7 V 5
High-level input voltage VIH 2 V VCC = 3 V to 3.6 V 5
Low-level input voltage VIL 0 V VCC = 0.8 V 5
Low-level input voltage VIL 0.7 V VCC = 2.3 V to 2.7 V 5
Low-level input voltage VIL 0.9 V VCC = 3 V to 3.6 V 5
Input voltage VI 0 3.6 V 5
High-level output current IOH -20 μA VCC = 0.8 V 5
High-level output current IOH -1.1 mA VCC = 1.1 V 5
High-level output current IOH -1.7 mA VCC = 1.4 V 5
High-level output current IOH -1.9 mA VCC = 1.65 V 5
High-level output current IOH -3.1 mA VCC = 2.3 V 5
High-level output current IOH -4 mA VCC = 3 V 5
Low-level output current IOL 20 μA VCC = 0.8 V 5
Low-level output current IOL 1.1 mA VCC = 1.1 V 5
Low-level output current IOL 1.7 mA VCC = 1.4 V 5
Low-level output current IOL 1.9 mA VCC = 1.65 V 5
Low-level output current IOL 3.1 mA VCC = 2.3 V 5
Low-level output current IOL 4 mA VCC = 3 V 5
Input transition rise or fall rate Δt/Δv 200 ns/V VCC = 0.8 V to 3.6 V 5
Operating free-air temperature TA -40 85 °C 5
Junction-to-ambient thermal resistance RθJA 314.4 °C/W DCK (SC70) package 5
Junction-to-case (top) thermal resistance RθJC(top) 128.7 °C/W DCK (SC70) package 5
Junction-to-board thermal resistance RθJB 100.6 °C/W DCK (SC70) package 5
Junction-to-top characterization parameter ψJT 7.1 °C/W DCK (SC70) package 5
Junction-to-board characterization parameter ψJB 99.8 °C/W DCK (SC70) package 5
Low-level output voltage VOL 0.1 V IOL = 20 μA; VCC 0.8 V to 3.6 V; TA = -40°C to +85°C 6
Supply current ICC 0.5 μA VI = GND or (VCC to 3.6 V), IO = 0; VCC 0.8 V to 3.6 V; TA = 25°C 6
Supply current ICC 0.9 μA VI = GND or (VCC to 3.6 V), IO = 0; VCC 0.8 V to 3.6 V; TA = -40°C to +85°C 6
Additional supply current ΔICC 40 50 μA VI = VCC, 0.6 V, IO = 0; VCC 3.3 V 6
Input leakage current II 0.1 0.5 μA A or B inputs, VI = GND to 3.6 V; VCC 0 V to 3.6 V 6
Power-off leakage current Ioff 0.2 0.6 μA VI or VO = 0 V to 3.6 V; VCC 0 V 6
Additional power-off leakage current ΔIoff 0.2 0.6 μA VI or VO = 0 V to 3.6 V; VCC 0 V to 0.2 V 6
Propagation delay A or B to Y tpd 1 2.4 3.7 ns CL = 5 pF; VCC = 3.3 V ± 0.3 V; TA = 25°C 6
Propagation delay A or B to Y tpd 0.5 4.6 ns CL = 5 pF; VCC = 3.3 V ± 0.3 V; TA = -40°C to +85°C 6
Propagation delay A or B to Y tpd 1.5 4.7 6.4 ns CL = 30 pF; VCC = 3.3 V ± 0.3 V; TA = 25°C 7
Propagation delay A or B to Y tpd 1 7.8 ns CL = 30 pF; VCC = 3.3 V ± 0.3 V; TA = -40°C to +85°C 7

CAD (KiCad official)

  • Symbol: SN74AUP1G02DCKR
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SC-70-5 (KiCad packages3D, STEP)
  • 3D model files: sn74aup1g02dckr-etched.step / sn74aup1g02dckr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74aup1g02dckr.step / sn74aup1g02dckr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (48 pp, sha256 c4e6d2eab6c7ee32, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF