component

25CSM04T-I

Public Made by Adom

by adom

Microchip Tech EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentmemory25csm04t-ifactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

25CSM04T-I

Microchip Tech · EEPROM · SOIC-8

25CSM04T-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Chip Select input: a high-to-low transition starts a sequence and low-to-high ends it, and when deasserted the device is deselected, placed in Standby and SO goes high-impedance.
2 SO tri_state Serial Data Output: shifts data out on the falling edge of SCK and is high-impedance when the device is deselected or Hold is engaged.
3 WP input Write-Protect pin: protects the STATUS register and memory array via Block Protection in Legacy mode, or protects memory zones per the Memory Partition registers in Enhanced mode.
4 VSS power_in Ground.
5 SI input Serial Data Input: instructions, addresses and data are latched on the rising edge of SCK.
6 SCK input Serial Clock input: synchronizes data flow, with SI latched on the rising edge and SO clocked out on the falling edge.
7 HOLD input Hold input: pauses serial communication with the master without resetting the serial sequence while the device is selected.
8 VCC power_in Device power supply, 2.5V to 5.5V operating range.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VCC 2.5 5.5 V Industrial (I) 4
Operating temperature TA -40 85 °C Industrial (I) 4
Storage temperature -65 150 °C 4
Ambient temperature under bias -40 120 °C 4
ESD protection on all pins 4 kV 4
Low-Level Input Voltage VIL -0.3 V VCC ≥ 2.5V 4
Low-Level Output Voltage VOL 0.4 V IOL = 3.0 mA, 3.6V ≤ VCC ≤ 5.5V 4
Low-Level Output Voltage VOL 0.2 V IOL = 0.15 mA, 2.5V ≤ VCC ≤ 3.6V 4
Input Leakage Current ILI -1 1 µA CS = VCC, VIN = VSS or VCC 4
Output Leakage Current ILO -1 1 µA CS = VCC, VOUT = VSS or VCC 4
Internal Capacitance (all inputs and outputs) CINT 7 pF TA = 25°C, FCLK = 1.0 MHz, VCC = 5.0V (Note 1) 4
Operating Current (read) ICCREAD 3 mA VCC = 5.0V, SCK = 8 MHz, SO = Open 4
Operating Current (read) ICCREAD 2 mA VCC ≤ 3.0V, SCK = 5 MHz, SO = Open 4
Operating Current (write) ICCWRITE 3 mA VCC = 5.0V 4
Standby Current ICCS 2 µA VCC = 5.0V, CS = VCC, VIN = VCC or VSS 4
Standby Current ICCS 1 µA VCC = 2.5V, CS = VCC, VIN = VCC or VSS 4
Clock Frequency FCLK 8 MHz VCC ≥ 3.0V 5
Clock Frequency FCLK 5 MHz VCC ≥ 2.5V 5
CS Setup Time TCSS 30 ns VCC ≥ 3.0V 5
CS Setup Time TCSS 60 ns VCC ≥ 2.5V 5
CS Hold Time TCSH 30 ns VCC ≥ 3.0V 5
CS Hold Time TCSH 60 ns VCC ≥ 2.5V 5
CS Disable Time TCSD 30 ns VCC ≥ 3.0V 5
CS Disable Time TCSD 60 ns VCC ≥ 2.5V 5
Data Setup Time TSU 10 ns VCC ≥ 3.0V 5
Data Setup Time TSU 20 ns VCC ≥ 2.5V 5
Data Hold Time THD 10 ns VCC ≥ 3.0V 5
Data Hold Time THD 20 ns VCC ≥ 2.5V 5
CLK Rise Time TR 50 ns Note 1 5
CLK Fall Time TF 50 ns Note 1 5
Clock High Time THI 40 ns VCC ≥ 3.0V 5
Clock High Time THI 80 ns VCC ≥ 2.5V 5
Clock Low Time TLO 40 ns VCC ≥ 3.0V 5
Clock Low Time TLO 80 ns VCC ≥ 2.5V 5
Clock Delay Time TCLD 50 ns 5
Output Valid from Clock Low TV 40 ns VCC ≥ 3.0V 5
Output Valid from Clock Low TV 80 ns VCC ≥ 2.5V 5
Output Hold Time THO 0 ns Note 1 5
Output Disable Time TDIS 40 ns VCC ≥ 3.0V 5
Output Disable Time TDIS 80 ns VCC ≥ 2.5V 5
HOLD Setup Time THS 10 ns VCC ≥ 3.0V 5
HOLD Setup Time THS 20 ns VCC ≥ 2.5V 5
HOLD Hold Time THH 10 ns VCC ≥ 3.0V 5
HOLD Hold Time THH 20 ns VCC ≥ 2.5V 5
HOLD Low to Output High Z THZ 40 ns VCC ≥ 3.0V (Note 1) 5
HOLD Low to Output High Z THZ 80 ns VCC ≥ 2.5V (Note 1) 5
HOLD High to Output Valid THV 40 ns VCC ≥ 3.0V 5
HOLD High to Output Valid THV 80 ns VCC ≥ 2.5V 5
Internal Write Cycle Time TWC 5 ms Note 2 5
Minimum VCC to Chip Select Low Time TVCSL 100 µs 8
Power-on Reset Threshold Voltage VPOR 1.5 V 8
Minimum time at VCC = 0V between power cycles TPOFF 1 ms 8
Write Endurance 1e+06 Write Cycles TA = 25°C, 2.5V ≤ VCC ≤ 5.5V 7
Data Retention 100 Years TA = 55°C 7

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 39

CAD (KiCad official)

  • Symbol: 25CSM04T-I
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 25csm04t-i-etched.step / 25csm04t-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 25csm04t-i.step / 25csm04t-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (52 pp, sha256 f5c323bcde9a27fc, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF