component
ADS1247IPWR
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownADS1247IPWR
Texas Instruments · Analog To Digital Converters (ADC) · TSSOP-20
ADS1247IPWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVDD | power_in | Digital power supply +2.7 V to +5.25 V, connect 0.1 μF bypass capacitor to DGND |
| 2 | DGND | power_in | Digital ground reference |
| 3 | CLK | input | External clock input 1 to 4.5 MHz, or tie to DGND to activate the internal oscillator |
| 4 | RESET | input | Reset input active low, pulse low for minimum 4 tCLK cycles to reset the device |
| 5 | REFP0/GPIO0 | bidirectional | Positive external reference input 0 or general-purpose digital input/output pin 0, reference voltage range 0.5 V to (AVDD - AVSS - 1 V) |
| 6 | REFN0/GPIO1 | bidirectional | Negative external reference input 0 or general-purpose digital input/output pin 1, reference voltage range (AVSS - 0.1 V) to (V(REFP) - 0.5 V) |
| 7 | VREFOUT | power_out | Positive internal reference voltage output ±2.048 V nominal, source/sink ±10 mA, connect 1 to 47 μF capacitor to VREFCOM |
| 8 | VREFCOM | power_out | Negative internal reference voltage output, connect to AVSS when using unipolar supply or to mid-voltage of power supply when using bipolar supply |
| 9 | AIN0/IEXC | input | Analog input 0 or optional excitation current source output, analog input voltage range (AVSS - 0.1 V) to (AVDD + 0.1 V) |
| 10 | AIN1/IEXC | input | Analog input 1 or optional excitation current source output, analog input voltage range (AVSS - 0.1 V) to (AVDD + 0.1 V) |
| 11 | AIN2/IEXC/GPIO2 | bidirectional | Analog input 2, optional excitation current source output, or general-purpose digital input/output pin 2, input voltage range (AVSS - 0.1 V) to (AVDD + 0.1 V) |
| 12 | AIN3/IEXC/GPIO3 | bidirectional | Analog input 3, optional excitation current source output, or general-purpose digital input/output pin 3, input voltage range (AVSS - 0.1 V) to (AVDD + 0.1 V) |
| 13 | AVSS | power_in | Negative analog power supply, -2.65 V to +0.1 V relative to DGND |
| 14 | AVDD | power_in | Positive analog power supply +2.7 V to +5.25 V, connect 0.1 μF bypass capacitor to AVSS |
| 15 | START | input | Conversion start input active high, pulse high for minimum 3 tCLK cycles to initiate a conversion |
| 16 | CS | input | Chip select input active low for SPI communication, brings DOUT/DRDY to high-impedance state when high |
| 17 | DRDY | output | Data ready output active low, indicates a new conversion result is available in the conversion result buffer |
| 18 | DOUT/DRDY | tri_state | Serial data output or data output combined with data ready, MSB first, enters high-impedance state when CS is taken high |
| 19 | DIN | input | Serial data input MSB first, data shifted in on the falling edge of SCLK |
| 20 | SCLK | input | Serial clock input for SPI communication up to 4.5 MHz, SCLK idles low, data shifted out on rising edge |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Data Acquisition |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
ADS1247IPWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
ads1247ipwr-etched.step/ads1247ipwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ads1247ipwr.step/ads1247ipwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (104 pp, sha256
08b29c91036dd059, retrieved 2026-09-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).