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SN74LVTH126DBR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SSOP-14-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LVTH126DBR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SSOP-14-208mil
SN74LVTH126DBR from Texas Instruments, in a SSOP-14-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable for buffer 1; Y output is high-impedance when this input is low, and active when high. |
| 2 | 1A | input | Data input of buffer 1 with bus hold; accepts up to 5.5 V recommended input voltage. |
| 3 | 1Y | tri_state | 3-state output of buffer 1, high-impedance when 1OE is low; IOL up to 64 mA and IOH up to -32 mA recommended for SN74LVTH126. |
| 4 | 2OE | input | Output enable for buffer 2; Y output is high-impedance when this input is low, and active when high. |
| 5 | 2A | input | Data input of buffer 2 with bus hold; accepts up to 5.5 V recommended input voltage. |
| 6 | 2Y | tri_state | 3-state output of buffer 2, high-impedance when 2OE is low; IOL up to 64 mA and IOH up to -32 mA recommended for SN74LVTH126. |
| 7 | GND | power_in | Ground pin. |
| 8 | 3Y | tri_state | 3-state output of buffer 3, high-impedance when 3OE is low; IOL up to 64 mA and IOH up to -32 mA recommended for SN74LVTH126. |
| 9 | 3A | input | Data input of buffer 3 with bus hold; accepts up to 5.5 V recommended input voltage. |
| 10 | 3OE | input | Output enable for buffer 3; Y output is high-impedance when this input is low, and active when high. |
| 11 | 4Y | tri_state | 3-state output of buffer 4, high-impedance when 4OE is low; IOL up to 64 mA and IOH up to -32 mA recommended for SN74LVTH126. |
| 12 | 4A | input | Data input of buffer 4 with bus hold; accepts up to 5.5 V recommended input voltage. |
| 13 | 4OE | input | Output enable for buffer 4; Y output is high-impedance when this input is low, and active when high. |
| 14 | VCC | power_in | Supply voltage, recommended 2.7 V to 3.6 V (absolute maximum -0.5 V to 4.6 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-14-208mil |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74LVTH126DBR - Footprint:
Package_SO:SSOP-14_5.3x6.2mm_P0.65mm - 3D model: SSOP-14-208mil (KiCad packages3D, STEP)
- 3D model files:
sn74lvth126dbr-etched.step/sn74lvth126dbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lvth126dbr.step/sn74lvth126dbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (23 pp, sha256
070c3051637a66df, retrieved 2026-10-01, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).