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Contents

README

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LMBTA94LT1G

LRC · Bipolar (BJT) · SOT-23

LMBTA94LT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BASE input Base terminal of the PNP transistor; the datasheet gives no separate limit for this pin, and the emitter-base ratings apply (VEBO -6 V, IE=-10uA breakdown minimum -6 V).
2 EMITTER passive Emitter terminal of the PNP transistor; the emitter-base reverse voltage is limited to -6 V (VEBO) per the absolute maximum ratings.
3 COLLECTOR passive Collector terminal of the PNP transistor; the datasheet limits collector current to -150 mA (IC) and collector-emitter and collector-base voltages to -400 V (VCEO and VCBO).

Key specifications

Parameter Value
Manufacturer LRC
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Collector to base breakdown voltage BVCBO -400 V IC=-100uA, IE=0 1
Collector to emitter breakdown voltage BVCEO -400 V IC=-1mA, IB=0 1
Emitter to base breakdown voltage BVEBO -6 V IE=-10uA, IC=0 1
Collector cutoff current ICBO -100 nA VCB=-400V, IE=0 1
Emitter cutoff current IEBO -100 nA VEB=-6V, IC=0 1
Collector emitter cutoff current ICES -500 nA VCE=-400V, VBE=0 1
Collector emitter saturation voltage 1 VCE(sat)1 -200 mV IC=-1mA, IB=-0.1mA; pulse test: pulse width <=380us, duty cycle <=2% 1
Collector emitter saturation voltage 2 VCE(sat)2 -300 mV IC=-10mA, IB=-1mA; pulse test: pulse width <=380us, duty cycle <=2% 1
Collector emitter saturation voltage 3 VCE(sat)3 -600 mV IC=-50mA, IB=-5mA; pulse test: pulse width <=380us, duty cycle <=2% 1
Base emitter saturation voltage VBE(sat) -900 mV IC=-10mA, IB=-1mA; pulse test: pulse width <=380us, duty cycle <=2% 1
DC current gain 1 hFE1 50 VCE=-10V, IC=-1mA; pulse test: pulse width <=380us, duty cycle <=2% 1
DC current gain 2 hFE2 75 200 VCE=-10V, IC=-10mA; pulse test: pulse width <=380us, duty cycle <=2% 1
DC current gain 3 hFE3 60 VCE=-10V, IC=-50mA; pulse test: pulse width <=380us, duty cycle <=2% 1
DC current gain 4 hFE4 20 VCE=-10V, IC=-100mA; pulse test: pulse width <=380us, duty cycle <=2% 1
Output capacitance Cob 4 6 pF VCE=-10V, f=1MHz 1
Collector to base voltage VCBO -400 V Ta=25°C 1
Collector to emitter voltage VCEO -400 V Ta=25°C 1
Emitter to base voltage VEBO -6 V Ta=25°C 1
Collector current IC -150 mA Ta=25°C 1
Total power dissipation 350 mW Ta=25°C 1
Storage temperature Tstg -55 150 °C 1
Junction temperature Tj 150 °C 1

CAD (KiCad official)

  • Symbol: LMBTA94LT1G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: lmbta94lt1g-etched.step / lmbta94lt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmbta94lt1g.step / lmbta94lt1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (3 pp, sha256 8dd0c7452226bef0, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF