component
STM32G0B1KCT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32G0B1KCT6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)
STM32G0B1KCT6 from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB9 | bidirectional | 5 V-tolerant FT_f I/O with Fm+ capability; alternate functions include IR_OUT, UCPD2_FRSTX, TIM17_CH1, FDCAN1_TX, USART3_RX, SPI2_NSS/I2S2_WS, I2C1_SDA and TIM4_CH4. |
| 2 | PC14-OSC32_IN | bidirectional | FT I/O supplied through the power switch, which sinks only 3 mA, so output use is limited to 2 MHz with 30 pF maximum load and it must not be used as a current source; also serves as OSC32_IN (and OSC_IN on this package). |
| 3 | PC15-OSC32_OUT | bidirectional | FT I/O supplied through the power switch with the same 3 mA limit (2 MHz / 30 pF output limit, no current-source use); also serves as OSC32_OUT, with OSC32_EN, OSC_EN and TIM15_BKIN alternate functions. |
| 4 | VDD/VDDA | power_in | Main supply pin: VDD = 1.7 (1.6) to 3.6 V for the regulator and system analog, and VDDA (1.62 V for ADC and COMP, 1.8 V for DAC, 2.4 V for VREFBUF, up to 3.6 V) is shared on this same pin. |
| 5 | VSS/VSSA | power_in | Ground pin for digital and analog circuits; all voltages are referenced to VSS. |
| 6 | PF2-NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor (NRST), which can also be used as PF2 I/O with MCO, LPUART2_TX and LPUART2_RTS_DE alternate functions. |
| 7 | PA0 | bidirectional | FT_a I/O: 5 V-tolerant with analog switch function; ADC_IN0, COMP1_INM8, TAMP_IN2 and WKUP1 are its additional functions, with SPI2_SCK/I2S2_CK, USART2_CTS, TIM2_CH1_ETR and COMP1_OUT as alternates. |
| 8 | PA1 | bidirectional | FT_ea I/O: 5 V-tolerant with analog switch function and switchable diode to VDDIOx; provides ADC_IN1 and COMP1_INP2, with SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, TIM2_CH2 and I2C1_SMBA as alternates. |
| 9 | PA2 | bidirectional | FT_a I/O: 5 V-tolerant with analog switch function; provides ADC_IN2, COMP2_INM8, WKUP4 and LSCO, with SPI1_MOSI/I2S1_SD, USART2_TX, TIM2_CH3, UCPD1_FRSTX and LPUART1_TX as alternates. |
| 10 | PA3 | bidirectional | FT_ea I/O: 5 V-tolerant with analog switch function and switchable diode to VDDIOx; provides ADC_IN3 and COMP2_INP2, with SPI2_MISO/I2S2_MCK, USART2_RX, TIM2_CH4 and LPUART1_RX as alternates. |
| 11 | PA4 | bidirectional | TT_a I/O: 3.6 V-tolerant with analog switch function; provides ADC_IN4, DAC1_OUT1 and the TAMP/RTC/WKUP functions listed for this package, with SPI1_NSS/I2S1_WS, SPI2_MOSI/I2S2_SD, USB_NOE, USART6_TX and TIM14_CH1 as alternates. |
| 12 | PA5 | bidirectional | TT_ea I/O: 3.6 V-tolerant with analog switch function and switchable diode to VDDIOx; provides ADC_IN5 and DAC1_OUT2, with SPI1_SCK/I2S1_CK, CEC, TIM2_CH1_ETR, USART6_RX and USART3_TX as alternates. |
| 13 | PA6 | bidirectional | FT_ea I/O: 5 V-tolerant with analog switch function and switchable diode to VDDIOx; provides ADC_IN6, with SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, USART6_CTS, COMP1_OUT, I2C2_SDA and I2C3_SDA as alternates. |
| 14 | PA7 | bidirectional | FT_a I/O: 5 V-tolerant with analog switch function; provides ADC_IN7, with SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1, COMP2_OUT, I2C2_SCL and I2C3_SCL as alternates. |
| 15 | PB0 | bidirectional | FT_ea I/O: 5 V-tolerant with analog switch function and switchable diode to VDDIOx; provides ADC_IN8 and COMP3_INP0, with SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N, FDCAN2_RX, USART3_RX, LPTIM1_OUT and COMP1_OUT as alternates. |
| 16 | PB1 | bidirectional | FT_ea I/O: 5 V-tolerant with analog switch function and switchable diode to VDDIOx; provides ADC_IN9 and COMP1_INM6, with TIM14_CH1, TIM3_CH4, TIM1_CH3N, FDCAN2_TX, USART3_RTS_DE_CK, LPTIM2_IN1 and COMP3_OUT as alternates. |
| 17 | PB2 | bidirectional | FT_ea I/O: 5 V-tolerant with analog switch function and switchable diode to VDDIOx; provides ADC_IN10, COMP1_INP1 and COMP3_INM6, with SPI2_MISO/I2S2_MCK, MCO2, USART3_TX, LPTIM1_OUT and EVENTOUT as alternates. |
| 18 | PA8 | bidirectional | FT_fcs I/O (Fm+ capable, USB Type-C PD capable, supplied per FT_s rules): may have an internal pull-down at reset depending on PA9 level, which can be disabled by strobing UCPDx_STROBE in SYSCFG_CFGR1; alternates include MCO, SPI2_NSS/I2S2_WS, TIM1_CH1, CRS1_SYNC and I2C2_SMBA. |
| 19 | PA9 | bidirectional | FT_fds I/O (Fm+ capable, USB Type-C PD dead-battery capable): may have an internal pull-down at reset depending on its level; alternates include MCO, USART1_TX, TIM1_CH2, SPI2_MISO/I2S2_MCK, TIM15_BKIN, I2C1_SCL and I2C2_SCL, and it can be remapped in place of PA11 via SYSCFG_CFGR1. |
| 20 | PC6 | bidirectional | FT_s I/O supplied only from VDDIO2; on this package VDDIO2 is internally connected to VDD, with UCPD1_FRSTX, TIM3_CH1, TIM2_CH3 and LPUART2_TX as alternates. |
| 21 | PA10 | bidirectional | FT_fds I/O (Fm+ capable, USB Type-C PD dead-battery capable): may have an internal pull-down at reset depending on its level; alternates include SPI2_MOSI/I2S2_SD, USART1_RX, TIM1_CH3, MCO2, TIM17_BKIN, I2C1_SDA and I2C2_SDA, and it can be remapped in place of PA12. |
| 22 | PA11 [PA9] | bidirectional | FT_fs I/O (Fm+ capable, USB Type-C PD capable) that is the default USB_DM pin; alternates include SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, FDCAN1_RX, TIM1_BKIN2, I2C2_SCL and COMP1_OUT, and it can be remapped with PA12 via SYSCFG_CFGR1. |
| 23 | PA12 [PA10] | bidirectional | FT_fs I/O (Fm+ capable, USB Type-C PD capable) that is the default USB_DP pin; alternates include SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, FDCAN1_TX, I2S_CKIN, I2C2_SDA and COMP2_OUT, and it can be remapped with PA11 via SYSCFG_CFGR1. |
| 24 | PA13 | bidirectional | FT_es I/O: 5 V-tolerant with switchable diode to VDDIOx; at reset it is the SWDIO debug function with the internal pull-up active, with IR_OUT, USB_NOE, EVENTOUT and LPUART2_RX as alternates. |
| 25 | PA14-BOOT0 | bidirectional | FT_s I/O (5 V-tolerant) that at reset is the SWCLK debug function with the internal pull-down active, and is also the BOOT0 boot-mode pin; alternates include USART2_TX, EVENTOUT and LPUART2_TX. |
| 26 | PA15 | bidirectional | FT_s I/O (5 V-tolerant), with SPI1_NSS/I2S1_WS, USART2_RX, TIM2_CH1_ETR, MCO2, USART4_RTS_DE_CK, USART3_RTS_DE_CK, USB_NOE, EVENTOUT, I2C2_SMBA and SPI3_NSS as alternate functions. |
| 27 | PB3 | bidirectional | FT_a I/O: 5 V-tolerant with analog switch function; provides COMP2_INM6, with SPI1_SCK/I2S1_CK, TIM1_CH2, TIM2_CH2, USART5_TX, I2C3_SCL, I2C2_SCL and SPI3_SCK as alternates. |
| 28 | PB4 | bidirectional | FT_a I/O: 5 V-tolerant with analog switch function; provides COMP2_INP0, with SPI1_MISO/I2S1_MCK, TIM3_CH1, USART5_RX, USART1_CTS, TIM17_BKIN, I2C3_SDA, I2C2_SDA and SPI3_MISO as alternates. |
| 29 | PB5 | bidirectional | FT I/O (5 V-tolerant) with WKUP6 wakeup function, and alternates including SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, FDCAN2_RX, LPTIM1_IN1, I2C1_SMBA, COMP2_OUT and SPI3_MOSI. |
| 30 | PB6 | bidirectional | FT_fa I/O: 5 V-tolerant, Fm+ capable, with analog switch function; provides COMP2_INP1, with USART1_TX, TIM1_CH3, TIM16_CH1N, FDCAN2_TX, SPI2_MISO/I2S2_MCK, LPTIM1_ETR, I2C1_SCL and LPUART2_TX as alternates. |
| 31 | PB7 | bidirectional | FT_fa I/O: 5 V-tolerant, Fm+ capable, with analog switch function; provides COMP2_INM7 and PVD_IN, with USART1_RX, SPI2_MOSI/I2S2_SD, TIM17_CH1N, LPTIM1_IN2, I2C1_SDA and LPUART2_RX as alternates. |
| 32 | PB8 | bidirectional | FT_f I/O: 5 V-tolerant and Fm+ capable; alternates include CEC, SPI2_SCK/I2S2_CK, TIM16_CH1, FDCAN1_RX, USART3_TX, TIM15_BKIN, I2C1_SCL and TIM4_CH3. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
CAD (KiCad official)
- Symbol:
STM32G0B1KCT6 - Footprint:
Package_QFP:LQFP-32_7x7mm_P0.8mm - 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32g0b1kct6-etched.step/stm32g0b1kct6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32g0b1kct6.step/stm32g0b1kct6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (159 pp, sha256
19ad77934ee0849d, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).