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TPS54478RTER

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Texas Instruments DC-DC Converters, WQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps54478rterfactory-2.0.0extractor-text
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Datasheet

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Contents

README

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TPS54478RTER

Texas Instruments · DC-DC Converters · WQFN-16-EP(3x3)

TPS54478RTER from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Input supply voltage, 2.95 V to 6 V.
2 VIN power_in Input supply voltage, 2.95 V to 6 V.
3 GND power_in Power ground; this pin should be electrically connected directly to the power pad under the IC.
4 GND power_in Power ground; this pin should be electrically connected directly to the power pad under the IC.
5 AGND power_in Analog ground should be electrically connected to GND close to the device.
6 VSENSE input Inverting node of the transconductance (gm) error amplifier.
7 COMP bidirectional Error amplifier output and input to the output switch current comparator; frequency compensation components connect to this pin.
8 RT/CLK input Resistor timing or external clock input; the RT/CLK pin is typically 0.5 V, and the synchronization square wave must transition below 0.6 V and above 1.6 V typically.
9 SS/TR input Slow start and tracking pin; an external capacitor sets the output voltage rise time, and higher charge current applies when SS is below 0.15 V.
10 PH output Source of the internal high-side power MOSFET and drain of the internal low-side (synchronous) rectifier MOSFET.
11 PH output Source of the internal high-side power MOSFET and drain of the internal low-side (synchronous) rectifier MOSFET.
12 PH output Source of the internal high-side power MOSFET and drain of the internal low-side (synchronous) rectifier MOSFET.
13 BOOT output A bootstrap capacitor is required between BOOT and PH; if its voltage falls below the BOOT UVLO minimum, the output is forced to switch off until the capacitor is refreshed.
14 PWRGD output Open-drain output that asserts low if the output voltage is low due to thermal shutdown, overcurrent, over/under-voltage, or EN shutdown.
15 EN input Enable pin with internal pull-up current source; pull below 1.21 V to disable and float to enable, and two additional resistors can set the on/off threshold (adjust UVLO).
17 Thermal Pad power_in GND pin should be connected to the exposed thermal pad for proper operation, and the pad should be connected to an internal PCB ground plane using multiple vias.
16 VIN power_in Input supply voltage, 2.95 V to 6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WQFN-16-EP(3x3)
Category Power Management (PMIC)
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage (VIN pin) VIN -0.3 7 V 4
EN pin voltage EN -0.3 7 V 4
VSENSE pin voltage VSENSE -0.3 3 V 4
COMP pin voltage COMP -0.3 3 V 4
PWRGD pin voltage PWRGD -0.3 7 V 4
SS/TR pin voltage SS/TR -0.3 3 V 4
RT/CLK pin voltage RT/CLK -0.3 3.3 V 4
BOOT-PH output voltage BOOT-PH 7 V 4
PH output voltage (DC) PH -0.6 7 V 4
PH output voltage (transient) PH -2 10 V 10 ns transient 4
EN source current EN 100 µA 4
RT/CLK source current RT/CLK 100 µA 4
COMP sink current COMP 100 µA 4
PWRGD sink current PWRGD 10 mA 4
SS/TR sink current SS/TR 100 µA 4
Junction temperature Tj -40 150 °C 4
Storage temperature Tstg -65 150 °C 4
Input voltage range VIN 2.95 6 V 4
Output current IOUT 0 4 A 4
Operating junction temperature range TJ -40 150 °C 4
Operating input voltage VIN 2.95 6 V 5
Shutdown supply current 0.7 2.5 μA EN = 0 V, 25°C, 2.95 V ≤ VIN ≤ 6 V 5
Quiescent current - Iq Iq 525 700 μA VSENSE = 0.7 V, VIN = 5 V, 25°C, RT = 78.7 kΩ 5
Voltage reference 0.594 0.6 0.606 V 2.95 V ≤ VIN ≤ 6 V, –40°C <TJ < 150°C 5
High side switch resistance 30 60 mΩ BOOT-PH = 5 V 5
High side switch resistance 37 70 mΩ BOOT-PH = 3.3 V 5
Low side switch resistance 30 60 mΩ VIN = 5 V 5
Low side switch resistance 37 70 mΩ VIN = 3.3 V 5
Error amplifier source/sink -20 20 µA V(COMP) = 1 V, 100 mV overdrive 5
Current limit threshold 5.2 6.5 8.2 A VIN = 6V, Fs = 500 KHz 5
Switching frequency range using RT mode 200 2000 kHz 6
Switching frequency 400 500 600 kHz R(RT/CLK) = 78.7 kΩ 6
Switching frequency range using CLK mode 300 2000 kHz 6
RT/CLK high threshold 1.6 2.2 V 6
RT/CLK low threshold 0.4 0.6 V 6
On resistance (PWRGD) 56 120 Ω VIN = 2.95 V 6
Output low (PWRGD) 0.2 0.3 V I(PWRGD) = 3 mA 6
Minimum VIN for valid output (PWRGD) 1.2 1.6 V V(PWRGD) < 0.5 V at 100 μA 6
Junction-to-ambient thermal resistance RθJA 49.1 °C/W 5
Junction-to-case (top) thermal resistance RθJC(top) 0.7 °C/W 5
Junction-to-board thermal resistance RθJB 21.8 °C/W 5
Junction-to-top characterization parameter ψJT 50.7 °C/W 5
Junction-to-board characterization parameter ψJB 7.5 °C/W 5
Junction-to-case (bottom) thermal resistance RθJC(bot) 21.8 °C/W 5
Input under voltage lockout threshold 2.6 V No voltage hysteresis 5
Enable threshold (rising) 1.3 V Rising 5
Enable threshold (falling) 1.21 V Falling 5
Error amplifier transconductance (gm) gm 225 μmhos –2 μA < I(COMP) < 2 μA, V(COMP) = 1 V 5
Error amplifier transconductance (gm) during slow start gm 77 μmhos –2 μA < I(COMP) < 2 μA, V(COMP) = 1 V, Vsense = 0.4 V 5
COMP to Iswitch gm 14 A/V 5
Thermal shutdown 165 °C 5
Thermal shutdown hysteresis 15 °C 6
SS voltage threshold (VSSTHR) VSSTHR 0.15 V 6
SS charge current 45 µA V(SS/TR) < VSSTHR 6
SS charge current 2.2 µA V(SS/TR) > VSSTHR 6
BOOT-PH UVLO 2.2 V VIN = 2.95 V 6
BOOT charge resistance 15 Ω VIN = 5 V 6
Low side FET reverse current limit 3.1 A 5
Cycles before entering hiccup 512 Cycles 5
Cycles of converter in off state during hiccup 16384 Cycles 5

CAD (KiCad official)

  • Symbol: TPS54478RTER
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps54478rter-etched.step / tps54478rter-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps54478rter.step / tps54478rter.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 efbe291862db5c5d, retrieved 2026-10-10, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF