Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

IPD096N08N3GATMA1

Infineon Technologies · MOSFETs · TO-252

IPD096N08N3GATMA1 from Infineon Technologies, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate pin 1 of the N-channel OptiMOS 3 MOSFET; VGS is rated ±20 V with typical threshold 2.8 V (2 to 3.5 V) at ID=46 µA.
2 D passive Drain pin 2, also connected to the metal tab; VDS is 80 V and continuous drain current is 73 A at TC=25 °C.
3 S passive Source pin 3 of the MOSFET; the body diode continuous forward current is 74 A.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package TO-252
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Continuous drain current I_D 73 A T_C=25 °C 1
Continuous drain current I_D 52 A T_C=100 °C 1
Pulsed drain current I_D,pulse 292 A T_C=25 °C 1
Avalanche energy, single pulse E_AS 90 mJ I_D=46 A, R_GS=25 W (as printed) 1
Gate source voltage V_GS -20 20 V 1
Power dissipation P_tot 100 W T_C=25 °C 1
Operating and storage temperature T_j, T_stg -55 175 °C 1
Thermal resistance, junction - case R_thJC 1.5 K/W 2
Thermal resistance, junction - ambient R_thJA 75 K/W minimal footprint 2
Thermal resistance, junction - ambient R_thJA 50 K/W 6 cm2 cooling area (footnote 4) 2
Drain-source breakdown voltage V(BR)DSS 80 V V_GS=0 V, I_D=1 mA 2
Gate threshold voltage V_GS(th) 2 2.8 3.5 V V_DS=V_GS, I_D=46 µA 2
Zero gate voltage drain current I_DSS 0.1 1 µA V_DS=80 V, V_GS=0 V, T_j=25 °C 2
Zero gate voltage drain current I_DSS 10 100 µA V_DS=80 V, V_GS=0 V, T_j=125 °C 2
Gate-source leakage current I_GSS 1 100 nA V_GS=20 V, V_DS=0 V 2
Drain-source on-state resistance R_DS(on) 7.9 9.6 mW V_GS=10 V, I_D=46 A 2
Drain-source on-state resistance R_DS(on) 10.5 17.8 mW V_GS=6 V, I_D=23 A 2
Transconductance g_fs 30 60 S /V_DS/>2/I_D/R_DS(on)max, I_D=46 A 2
Input capacitance C_iss 1810 2410 pF V_GS=0 V, V_DS=40 V, f=1 MHz 3
Output capacitance C_oss 490 652 pF V_GS=0 V, V_DS=40 V, f=1 MHz 3
Gate charge total Q_g 26 35 nC V_DD=40 V, I_D=46 A, V_GS=0 to 10 V 3
Output charge Q_oss 35 47 nC V_DD=40 V, V_GS=0 V 3
Diode continuous forward current I_S 74 A 3
Diode pulse current I_S,pulse 296 A 3
Diode forward voltage V_SD 1 1.2 V V_GS=0 V, I_F=46 A, T_j=25 °C 3

CAD (KiCad official)

  • Symbol: IPD096N08N3GATMA1
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: ipd096n08n3gatma1-etched.step / ipd096n08n3gatma1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ipd096n08n3gatma1.step / ipd096n08n3gatma1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (9 pp, sha256 81f91acc3a617676, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF