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TPS561208DDCT

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Texas Instruments DC-DC Converters, TSOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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TPS561208DDCT

Texas Instruments · DC-DC Converters · TSOT-23-6

TPS561208DDCT from Texas Instruments, in a TSOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground pin source terminal of the low-side power NFET and the ground terminal for the controller circuit, with sensitive VFB connected to this GND at a single point.
2 SW output Switch node connection between the high-side and low-side NFETs, with a recommended operating range of -1.8 V to 17 V (10 ns transient -3.5 V to 20 V).
3 VIN power_in Input voltage supply pin and drain terminal of the high-side power NFET, with a recommended supply input voltage of 4.5 V to 17 V.
4 VFB input Converter feedback input that connects to the output voltage through a feedback resistor divider, with a recommended input voltage range of -0.1 V to 5.5 V.
5 EN input Active-high enable input that must be pulled up to enable the device, with a recommended input voltage range of -0.1 V to 17 V.
6 VBST power_in Supply input for the high-side NFET gate drive circuit, which requires a 0.1-µF capacitor between VBST and SW, with a recommended VBST vs SW range of -0.1 V to 6.0 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSOT-23-6
Category Power Management (PMIC)
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage (VIN, EN) VIN, EN -0.3 19 V 4
Input voltage (VBST) VBST -0.3 25 V 4
Input voltage (VBST, 10-ns transient) VBST -0.3 27 V 10-ns transient 4
Input voltage (VBST vs SW) VBST (vs SW) -0.3 6.5 V 4
Input voltage (VFB) VFB -0.3 6.5 V 4
Input voltage (SW) SW -2 19 V 4
Input voltage (SW, 10-ns transient) SW -3.5 21 V 10 ns transient 4
Operating junction temperature TJ -40 150 °C 4
Storage temperature Tstg -55 150 °C 4
Supply input voltage VIN 4.5 17 V 4
Input voltage (VBST) VI (VBST) -0.1 23 V 4
Input voltage (VBST, 10-ns transient) VI (VBST) -0.1 26 V 10-ns transient 4
Input voltage (VBST vs SW) VI (VBST vs SW) -0.1 6 V 4
Input voltage (EN) VI (EN) -0.1 17 V 4
Input voltage (VFB) VI (VFB) -0.1 5.5 V 4
Input voltage (SW) VI (SW) -1.8 17 V 4
Input voltage (SW, 10-ns transient) VI (SW) -3.5 20 V 10-ns transient 4
Operating junction temperature TJ -40 125 °C 4
Operating, non-switching supply current IVIN 590 750 µA VIN current, EN = 5 V, VFB = 0.8 V (TPS561208) 5
Shutdown supply current IVINSDN 1 10 µA VIN current, EN = 0 V 5
EN high-level input voltage VENH 1.6 V EN 5
EN low-level input voltage VENL 0.8 V EN 5
EN pin resistance to GND REN 225 400 900 kΩ VEN = 12 V 5
VFB threshold voltage (continuous mode) VFBTH 749 768 787 mV VO = 1.05 V, continuous mode operation 5
VFB input current IVFB -0.1 0 0.1 µA VFB = 0.8 V 5
Current limit Iocl 1.2 1.6 2 A DC current, VOUT = 1.05 V, L1 = 2.2 µH 5
Minimum off time tOFF(MIN) 220 310 ns VFB = 0.5 V 5
UVLO wake-up VIN voltage UVLO 4 4.3 V 6
UVLO shut-down VIN voltage UVLO 3.3 3.6 V 6
UVLO hysteresis VIN voltage UVLO 0.4 V 6
High-side switch resistance RDS(on)h 140 mΩ TA = 25°C, VBST, SW = 5.5 V 5
Low-side switch resistance RDS(on)l 84 mΩ TA = 25°C 5
Thermal shutdown threshold TSDN 160 °C Shutdown temperature (not production tested) 5
Thermal shutdown hysteresis TSDN 25 °C Hysteresis 5
Soft-start time tss 1 ms Internal soft-start time 5
Switching frequency Fsw 580 kHz VIN = 12 V, VO = 1.05 V, FCCM mode 5
Output UVP threshold VUVP 65 % Hiccup detect (H > L) 5
Hiccup wait time THICCUP_WAIT 1.8 ms 5
Hiccup time before restart THICCUP_RETRY 15 ms 5
Junction-to-ambient thermal resistance RθJA 90.8 °C/W DDC (SOT) 6-pin package 4
Junction-to-case (top) thermal resistance RθJC(top) 42.3 °C/W DDC (SOT) 6-pin package 4
Junction-to-board thermal resistance RθJB 16.3 °C/W DDC (SOT) 6-pin package 4
Junction-to-top characterization parameter ψJT 2.6 °C/W DDC (SOT) 6-pin package 5
Junction-to-board characterization parameter ψJB 16.3 °C/W DDC (SOT) 6-pin package 5

CAD (KiCad official)

  • Symbol: TPS561208DDCT
  • Footprint: Package_TO_SOT_SMD:TSOT-23-6
  • 3D model: TSOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: tps561208ddct-etched.step / tps561208ddct-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps561208ddct.step / tps561208ddct.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (28 pp, sha256 d4a340e310292b34, retrieved 2026-10-21, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF