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GD32F350R8T6

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GigaDevice Semicon Beijing Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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GD32F350R8T6

GigaDevice Semicon Beijing · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

GD32F350R8T6 from GigaDevice Semicon Beijing, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup-domain supply pin with default function VBAT; the excerpt gives no voltage limits for it.
2 PC13-TAMPER-RTC bidirectional General-purpose I/O PC13 by default, with additional functions RTC_TAMP0, RTC_TS, RTC_OUT and WKUP1.
3 PC14-OSC32IN bidirectional General-purpose I/O PC14 by default, with additional function OSC32IN.
4 PC15-OSC32OUT bidirectional General-purpose I/O PC15 by default, with additional function OSC32OUT.
5 PF0-OSCIN bidirectional 5 V tolerant I/O with default function PF0, alternate function CTC_SYNC and additional function OSCIN.
6 PF1-OSCOUT bidirectional 5 V tolerant I/O with default function PF1 and additional function OSCOUT.
7 NRST bidirectional Reset pin with default function NRST; its electrical characteristics are given in datasheet section 4.11.
8 PC0 bidirectional I/O with default function PC0, alternate function EVENTOUT and additional function ADC_IN10.
9 PC1 bidirectional I/O with default function PC1, alternate function EVENTOUT and additional function ADC_IN11.
10 PC2 bidirectional I/O with default function PC2, alternate function EVENTOUT and additional function ADC_IN12.
11 PC3 bidirectional I/O with default function PC3, alternate function EVENTOUT and additional function ADC_IN13.
12 VSSA power_in Analog ground pin with default function VSSA.
13 VDDA power_in Analog supply pin with default function VDDA; the excerpt gives no voltage limits for it.
14 PA0-WKUP bidirectional I/O with default function PA0, alternates USART1_CTS, TIMER1_CH0, TIMER1_ETI, CMP0_OUT, TSI_G0_IO0 and I2C1_SCL, and additional functions ADC_IN0, CMP0_IM6, RTC_TAMP1 and WKUP0.
15 PA1 bidirectional I/O with default function PA1, alternates USART1_RTS, TIMER1_CH1, TSI_G0_IO1, I2C1_SDA and EVENTOUT, and additional functions ADC_IN1 and CMP0_IP.
16 PA2 bidirectional I/O with default function PA2, alternates USART1_TX, TIMER1_CH2, TIMER14_CH0, CMP1_OUT and TSI_G0_IO2, and additional functions ADC_IN2 and CMP1_IM6.
17 PA3 bidirectional I/O with default function PA3, alternates USART1_RX, TIMER1_CH3, TIMER14_CH1 and TSI_G0_IO3, and additional functions ADC_IN3 and CMP1_IP.
18 PF4 bidirectional 5 V tolerant I/O with default function PF4 and alternate function EVENTOUT.
19 PF5 bidirectional 5 V tolerant I/O with default function PF5 and alternate function EVENTOUT.
20 PA4 bidirectional I/O with default function PA4, alternates SPI0_NSS, I2S0_WS, USART1_CK, TIMER13_CH0, TSI_G1_IO0 and SPI1_NSS, and additional functions ADC_IN4, CMP0_IM4, CMP1_IM4 and DAC0_OUT.
21 PA5 bidirectional I/O with default function PA5, alternates SPI0_SCK, I2S0_CK, CEC, TIMER1_CH0, TIMER1_ETI and TSI_G1_IO1, and additional functions ADC_IN5, CMP0_IM5 and CMP1_IM5.
22 PA6 bidirectional I/O with default function PA6, alternates SPI0_MISO, I2S0_MCK, TIMER2_CH0, TIMER0_BKIN, TIMER15_CH0, CMP0_OUT, TSI_G1_IO2 and EVENTOUT, and additional function ADC_IN6.
23 PA7 bidirectional I/O with default function PA7, alternates SPI0_MOSI, I2S0_SD, TIMER2_CH1, TIMER13_CH0, TIMER0_CH0_ON, TIMER16_CH0, CMP1_OUT, TSI_G1_IO3 and EVENTOUT, and additional function ADC_IN7.
24 PC4 bidirectional I/O with default function PC4, alternate function EVENTOUT and additional function ADC_IN14.
25 PC5 bidirectional I/O with default function PC5, alternate function TSI_G2_IO0 and additional functions ADC_IN15 and WKUP4.
26 PB0 bidirectional I/O with default function PB0, alternates TIMER2_CH2, TIMER0_CH1_ON, TSI_G2_IO1, USART1_RX and EVENTOUT, and additional function ADC_IN8.
27 PB1 bidirectional I/O with default function PB1, alternates TIMER2_CH3, TIMER13_CH0, TIMER0_CH2_ON, TSI_G2_IO2 and SPI1_SCK, and additional function ADC_IN9.
28 PB2 bidirectional 5 V tolerant I/O with default function PB2 and alternate function TSI_G2_IO3.
29 PB10 bidirectional 5 V tolerant I/O with default function PB10, alternates I2C1_SCL, CEC, TIMER1_CH2, TSITG and SPI1_IO2.
30 PB11 bidirectional 5 V tolerant I/O with default function PB11, alternates I2C1_SDA, TIMER1_CH3, TSI_G5_IO0, EVENTOUT and SPI1_IO3.
31 VSS power_in Ground pin with default function VSS.
32 VDD power_in Digital supply pin with default function VDD; the excerpt gives no voltage limits for it.
33 PB12 bidirectional 5 V tolerant I/O with default function PB12, alternates SPI1_NSS, TIMER0_BKIN, TSI_G5_IO1, I2C1_SMBA and EVENTOUT.
34 PB13 bidirectional 5 V tolerant I/O with default function PB13, alternates SPI1_SCK, TIMER0_CH0_ON and TSI_G5_IO2.
35 PB14 bidirectional 5 V tolerant I/O with default function PB14, alternates SPI1_MISO, TIMER0_CH1_ON, TIMER14_CH0 and TSI_G5_IO3.
36 PB15 bidirectional 5 V tolerant I/O with default function PB15, alternates SPI1_MOSI, TIMER0_CH2_ON, TIMER14_CH0_ON and TIMER14_CH1, and additional functions RTC_REFIN and WKUP6.
37 PC6 bidirectional 5 V tolerant I/O with default function PC6 and alternates TIMER2_CH0 and I2S0_MCK.
38 PC7 bidirectional 5 V tolerant I/O with default function PC7 and alternate function TIMER2_CH1.
39 PC8 bidirectional 5 V tolerant I/O with default function PC8 and alternate function TIMER2_CH2.
40 PC9 bidirectional 5 V tolerant I/O with default function PC9 and alternate function TIMER2_CH3.
41 PA8 bidirectional 5 V tolerant I/O with default function PA8, alternates USART0_CK, TIMER0_CH0, CK_OUT, USART1_TX, EVENTOUT, USBFS_SOF and CTC_SYNC.
42 PA9 bidirectional 5 V tolerant I/O with default function PA9, alternates USART0_TX, TIMER0_CH1, TIMER14_BKIN, TSI_G3_IO0, I2C0_SCL and USBFS_VBUS.
43 PA10 bidirectional 5 V tolerant I/O with default function PA10, alternates USART0_RX, TIMER0_CH2, TIMER16_BKIN, TSI_G3_IO1, I2C0_SDA and USBFS_ID.
44 PA11 bidirectional 5 V tolerant I/O with default function PA11, alternates USART0_CTS, TIMER0_CH3, CMP0_OUT, TSI_G3_IO2, EVENTOUT and SPI1_IO2, and additional function USBFS_DM.
45 PA12 bidirectional 5 V tolerant I/O with default function PA12, alternates USART0_RTS, TIMER0_ETI, CMP1_OUT, TSI_G3_IO3, EVENTOUT and SPI1_IO3, and additional function USBFS_DP.
46 PA13 bidirectional 5 V tolerant I/O with default function PA13 and alternates IFRP_OUT, SWDIO and SPI1_MISO.
47 PF6 bidirectional 5 V tolerant I/O with default function PF6 and alternate function I2C1_SCL.
48 PF7 bidirectional 5 V tolerant I/O with default function PF7 and alternate function I2C1_SDA.
49 PA14 bidirectional 5 V tolerant I/O with default function PA14 and alternates USART1_TX, SWCLK and SPI1_MOSI.
50 PA15 bidirectional 5 V tolerant I/O with default function PA15, alternates SPI0_NSS, I2S0_WS, USART1_RX, TIMER1_CH0, TIMER1_ETI, SPI1_NSS and EVENTOUT.
51 PC10 bidirectional 5 V tolerant I/O with default function PC10 only; no alternate functions are listed.
52 PC11 bidirectional 5 V tolerant I/O with default function PC11 only; no alternate functions are listed.
53 PC12 bidirectional 5 V tolerant I/O with default function PC12 only; no alternate functions are listed.
54 PD2 bidirectional 5 V tolerant I/O with default function PD2 and alternate function TIMER2_ETI.
55 PB3 bidirectional 5 V tolerant I/O with default function PB3 and alternates SPI0_SCK, I2S0_CK, TIMER1_CH1, TSI_G4_IO0 and EVENTOUT.
56 PB4 bidirectional 5 V tolerant I/O with default function PB4 and alternates SPI0_MISO, I2S0_MCK, TIMER2_CH0, TSI_G4_IO1 and EVENTOUT.
57 PB5 bidirectional 5 V tolerant I/O with default function PB5, alternates SPI0_MOSI, I2S0_SD, I2C0_SMBA, TIMER15_BKIN and TIMER2_CH1, and additional function WKUP5.
58 PB6 bidirectional 5 V tolerant I/O with default function PB6 and alternates I2C0_SCL, USART0_TX, TIMER15_CH0_ON and TSI_G4_IO2.
59 PB7 bidirectional 5 V tolerant I/O with default function PB7 and alternates I2C0_SDA, USART0_RX, TIMER16_CH0_ON and TSI_G4_IO3.
60 BOOT0 input Input pin with default function BOOT0; boot mode selection is described in datasheet section 3.4.
61 PB8 bidirectional 5 V tolerant I/O with default function PB8 and alternates I2C0_SCL, CEC, TIMER15_CH0 and TSITG.
62 PB9 bidirectional 5 V tolerant I/O with default function PB9, alternates I2C0_SDA, IFRP_OUT, TIMER16_CH0, EVENTOUT and I2S0_MCK.
63 VSS power_in Ground pin with default function VSS.
64 VDD power_in Digital supply pin with default function VDD; the excerpt gives no voltage limits for it.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Maximum current for GPIO pin IIO -25 25 mA 44
Operating temperature range TA -40 85 °C 44
Storage temperature range TSTG -55 150 °C 44
Maximum junction temperature TJ 125 °C 44
Variations between different VDD power pins /ΔVDDx/ 50 mV 44
Variations between different ground pins /VSSX −VSS/ 50 mV 44
Input voltage on other I/O (max) VIN 3.6 V 44
Supply voltage VDD 2.6 3.3 3.6 V 44
Analog supply voltage VDDA 2.6 3.3 3.6 V Same as VDD 44
Battery supply voltage VBAT 1.8 3.6 V 44
AHB1 clock frequency fHCLK1 0 108 MHz 45
AHB2 clock frequency fHCLK2 0 108 MHz 45
APB1 clock frequency fAPB1 0 54 MHz 45
APB2 clock frequency fAPB2 0 54 MHz 45
VDD rise time rate tVDD 0 μs/V 45
VDD fall time rate tVDD 20 μs/V 45
Low Voltage Detector Threshold VLVD 2.08 2.14 2.19 V LVDT[2:0] = 000, rising edge 54
Low Voltage Detector Threshold VLVD 1.99 2.03 2.08 V LVDT[2:0] = 000, falling edge 54
Low Voltage Detector Threshold VLVD 2.22 2.28 2.33 V LVDT[2:0] = 001, rising edge 54
Low Voltage Detector Threshold VLVD 2.13 2.17 2.22 V LVDT[2:0] = 001, falling edge 54
Low Voltage Detector Threshold VLVD 2.36 2.42 2.47 V LVDT[2:0] = 010, rising edge 54
Low Voltage Detector Threshold VLVD 2.26 2.32 2.37 V LVDT[2:0] = 010, falling edge 54
Low Voltage Detector Threshold VLVD 2.49 2.55 2.62 V LVDT[2:0] = 011, rising edge 54
Low Voltage Detector Threshold VLVD 2.39 2.45 2.52 V LVDT[2:0] = 011, falling edge 54
Low Voltage Detector Threshold VLVD 2.63 2.69 2.76 V LVDT[2:0] = 100, rising edge 54
Low Voltage Detector Threshold VLVD 2.53 2.59 2.66 V LVDT[2:0] = 100, falling edge 54
Low Voltage Detector Threshold VLVD 2.76 2.83 2.9 V LVDT[2:0] = 101, rising edge 54
Low Voltage Detector Threshold VLVD 2.66 2.73 2.79 V LVDT[2:0] = 101, falling edge 54
Low Voltage Detector Threshold VLVD 2.9 2.97 3.04 V LVDT[2:0] = 110, rising edge 54
Low Voltage Detector Threshold VLVD 2.8 2.87 2.93 V LVDT[2:0] = 110, falling edge 54
Low Voltage Detector Threshold VLVD 3.03 3.11 3.19 V LVDT[2:0] = 111, rising edge 54
Low Voltage Detector Threshold VLVD 2.94 3.01 3.07 V LVDT[2:0] = 111, falling edge 54
High speed external clock (HXTAL) crystal/ceramic frequency fHXTAL 4 8 32 MHz 2.6 V ≤ VDD ≤ 3.6 V 55
High speed external user clock frequency (bypass) fHXTAL_ext 1 8 50 MHz VDD = 3.3 V 55
Low speed external user clock frequency (bypass) fLXTAL_ext 32.768 1000 kHz 56
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -4 5 % VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 57
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -2 2 % VDD = VDDA = 3.3 V, TA = 0 °C ~ +85 °C 57
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -1 1 % VDD = VDDA = 3.3 V, TA = 25 °C 57
Low speed internal oscillator (IRC40K) frequency fIRC40K 20 40 45 kHz VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 57
PLL output clock frequency fPLLOUT 16 108 MHz 59
PLL VCO output clock frequency fVCO 108 MHz 59
PLL lock time tLOCK 320 μs 59
Number of guaranteed program/erase cycles (endurance) PECYC 100 kcycles 59
Word programming time wtPROG 37.5 86 μs TA = -40 °C ~ +85 °C 59
Page erase time tERASE 45 300 ms TA = -40 °C ~ +85 °C 59
Mass erase time (64KB) tMERASE(64KB) 0.5 1.6 s TA = -40 °C ~ +85 °C 59
NRST input low level voltage VIL(NRST) -0.5 V 2.6 V ≤ VDD = VDDA ≤ 3.6 V 59
Low level output voltage for 8 IO pins (each IIO = +8 mA) VOL 0.21 V VDD = 2.6 V 61
Low level output voltage for 8 IO pins (each IIO = +8 mA) VOL 0.19 V VDD = 3.3 V 61
Low level output voltage for 8 IO pins (each IIO = +8 mA) VOL 0.18 V VDD = 3.6 V 61
High level output voltage for 8 IO pins (each IIO = +8 mA) VOH 2.4 V VDD = 2.6 V 61
High level output voltage for 8 IO pins (each IIO = +8 mA) VOH 3.1 V VDD = 3.3 V 61
High level output voltage for 8 IO pins (each IIO = +8 mA) VOH 3.4 V VDD = 3.6 V 61
Internal pull-up resistor RPU 30 40 50 kΩ All pins, VIN = VSS 61
Internal pull-up resistor (PA10) RPU 7.5 10 13.5 kΩ PA10, VIN = VSS 61
Internal pull-down resistor RPD 30 40 50 kΩ All pins, VIN = VDD 61
Internal pull-down resistor (PA10) RPD 7.5 10 13.5 kΩ PA10, VIN = VDD 61
ADC clock frequency fADC 0.1 40 MHz 62
External input impedance RAIN 24 kΩ See Equation 1 62

CAD (KiCad official)

  • Symbol: GD32F350R8T6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: gd32f350r8t6-etched.step / gd32f350r8t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32f350r8t6.step / gd32f350r8t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (77 pp, sha256 32096375cb0a96b9, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF