component
SN74ALS574BN
Public Made by Adomby adom
Texas Instruments Flip Flops, PDIP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownSN74ALS574BN
Texas Instruments · Flip Flops · PDIP-20
SN74ALS574BN from Texas Instruments, in a PDIP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Output-enable input, active low; when high the 3-state outputs are high-impedance without affecting internal flip-flop operation. |
| 2 | 1D | input | Data input for flip-flop 1, latched on the low-to-high transition of CLK. |
| 3 | 2D | input | Data input for flip-flop 2, latched on the low-to-high transition of CLK. |
| 4 | 3D | input | Data input for flip-flop 3, latched on the low-to-high transition of CLK. |
| 5 | 4D | input | Data input for flip-flop 4, latched on the low-to-high transition of CLK. |
| 6 | 5D | input | Data input for flip-flop 5, latched on the low-to-high transition of CLK. |
| 7 | 6D | input | Data input for flip-flop 6, latched on the low-to-high transition of CLK. |
| 8 | 7D | input | Data input for flip-flop 7, latched on the low-to-high transition of CLK. |
| 9 | 8D | input | Data input for flip-flop 8, latched on the low-to-high transition of CLK. |
| 10 | GND | power_in | Ground pin. |
| 11 | CLK | input | Clock input; the eight flip-flops enter data on its low-to-high transition. |
| 12 | 8Q | tri_state | 3-state noninverting buffer-type output of flip-flop 8, able to drive bus lines directly. |
| 13 | 7Q | tri_state | 3-state noninverting buffer-type output of flip-flop 7, able to drive bus lines directly. |
| 14 | 6Q | tri_state | 3-state noninverting buffer-type output of flip-flop 6, able to drive bus lines directly. |
| 15 | 5Q | tri_state | 3-state noninverting buffer-type output of flip-flop 5, able to drive bus lines directly. |
| 16 | 4Q | tri_state | 3-state noninverting buffer-type output of flip-flop 4, able to drive bus lines directly. |
| 17 | 3Q | tri_state | 3-state noninverting buffer-type output of flip-flop 3, able to drive bus lines directly. |
| 18 | 2Q | tri_state | 3-state noninverting buffer-type output of flip-flop 2, able to drive bus lines directly. |
| 19 | 1Q | tri_state | 3-state noninverting buffer-type output of flip-flop 1, able to drive bus lines directly. |
| 20 | VCC | power_in | Supply voltage, recommended 4.5 V to 5.5 V (absolute maximum 7 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-20 |
| Category | Logic ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 4.5 | 5 | 5.5 | V | 3 | |
| High-level input voltage | VIH | 2 | V | 3 | |||
| Low-level input voltage | VIL | 0.8 | V | 3 | |||
| High-level output current | IOH | -2.6 | mA | 3 | |||
| Low-level output current | IOL | 24 | mA | 3 | |||
| Clock frequency | fclock | 0 | 35 | MHz | 'ALS574B | 3 | |
| Pulse duration, CLK high or low | tw | 14 | ns | 'ALS574B, CLK high or low | 3 | ||
| Setup time, data before CLK↑ | tsu | 15 | ns | Data | 3 | ||
| Hold time, data after CLK↑ | th | 0 | ns | Data | 3 | ||
| Operating free-air temperature | TA | 0 | 70 | °C | 3 | ||
| Input clamp voltage | VIK | -1.2 | V | VCC = 4.5 V, II = -18 mA | 4 | ||
| High-level output voltage | VOH | 2 | V | VCC = 4.5 V to 5.5 V, IOH = -0.4 mA (min given as VCC -2) | 4 | ||
| High-level output voltage | VOH | 2.4 | 3.2 | V | VCC = 4.5 V, IOH = -2.6 mA | 4 | |
| Low-level output voltage | VOL | 0.25 | 0.4 | V | VCC = 4.5 V, IOL = 12 mA | 4 | |
| Low-level output voltage | VOL | 0.35 | 0.5 | V | VCC = 4.5 V, IOL = 24 mA | 4 | |
| Off-state output current, high-level voltage applied | IOZH | 20 | µA | VCC = 5.5 V, VO = 2.7 V | 4 | ||
| Off-state output current, low-level voltage applied | IOZL | -20 | µA | VCC = 5.5 V, VO = 0.4 V | 4 | ||
| Input current at maximum input voltage | II | 0.1 | mA | VCC = 5.5 V, VI = 7 V | 4 | ||
| High-level input current | IIH | 20 | µA | VCC = 5.5 V, VI = 2.7 V | 4 | ||
| Low-level input current | IIL | -0.2 | mA | VCC = 5.5 V, VI = 0.4 V | 4 | ||
| Output current | IO | -30 | -112 | mA | VCC = 5.5 V, VO = 2.25 V | 4 | |
| Supply current, outputs high | ICC | 11 | 18 | mA | 'ALS574B, VCC = 5.5 V, outputs high | 4 | |
| Supply current, outputs low | ICC | 17 | 27 | mA | 'ALS574B, VCC = 5.5 V, outputs low | 4 | |
| Supply current, outputs disabled | ICC | 17 | 28 | mA | 'ALS574B, VCC = 5.5 V, outputs disabled | 4 | |
| Maximum clock frequency | fmax | 35 | MHz | VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = R2 = 500 Ω | 4 | ||
| Propagation delay CLK to Q (low-to-high) | tPLH | 3 | 14 | ns | VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = R2 = 500 Ω | 4 | |
| Propagation delay CLK to Q (high-to-low) | tPHL | 4 | 14 | ns | VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = R2 = 500 Ω | 4 | |
| Output enable time OE to Q (to high) | tPZH | 3 | 18 | ns | VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = R2 = 500 Ω | 4 | |
| Output enable time OE to Q (to low) | tPZL | 4 | 18 | ns | VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = R2 = 500 Ω | 4 | |
| Output disable time OE to Q (from high) | tPHZ | 1 | 10 | ns | VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = R2 = 500 Ω | 4 | |
| Output disable time OE to Q (from low) | tPLZ | 2 | 12 | ns | VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = R2 = 500 Ω | 4 | |
| Supply voltage | VCC | 7 | V | 3 | |||
| Input voltage | VI | 7 | V | 3 | |||
| Voltage applied to a disabled 3-state output | 5.5 | V | 3 | ||||
| Operating free-air temperature range | TA | 0 | 70 | °C | SN74ALS574B | 3 | |
| Storage temperature range | Tstg | -65 | 150 | °C | 3 |
CAD (KiCad official)
- Symbol:
SN74ALS574BN - Footprint:
Package_DIP:DIP-20_W7.62mm - 3D model: PDIP-20 (KiCad packages3D, STEP)
- 3D model files:
sn74als574bn-etched.step/sn74als574bn-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74als574bn.step/sn74als574bn.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (22 pp, sha256
9ca1967f9d1cf4b0, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).